#9 | SPRING 2008 posted May 14, 2008

EDITORIAL

Why you should never say never

CALENDAR

A listing of key events for the advanced substrate community

PAPERLINKS

Revelant papers from recent conferences and journals

SPECIAL SUPPLEMENT: SOI INDUSTRY CONSORTIUM

soi consortium

Where Leaders Are Partnering

Horacio Mendez photo
By Horacio Mendez,
Executive Director,
SOI Industry Consortium

The SOI Industry Consortium, which I have the honor to lead, is now in full swing. New members are coming on board, and our committees are meeting regularly and making very rapid progress.

I'm happy to report that the levels of energy and enthusiasm are incredible, the collaboration is fantastic and the expertise is excellent.

"The levels of energy and enthusiasm are incredible, the collaboration is fantastic and the expertise is excellent."

The Technical Committee is bringing in the depth and expertise of the major producers in computing, networking, consumer and mobile to solidify our direction on SOI and help optimize SOI technology for broad use.

The goal of the Users Committee is to represent major semiconductor applications to provide clear direction on the end users needs and obstacles. These inputs will be used directly to provide solutions that accelerate growths into new markets.

The Marketing Committee is promoting and focusing the message to the industry and attracting new members into the SOI consortium. The results are already evident, with the growing press coverage and membership list.

"Our committees are meeting regularly and making very rapid progress."

But there's plenty of work to do. In meetings with companies across the globe, it's clear that we have a lot of outreach to do with respect to SOI basics and advantages.

The main challenges driving people to consider SOI are the needs for:

Low power

Reliability

Performance

Together, Consortium members are partnering to show the entire industry that SOI is the right solution at the right time.

What's New

Board of Directors

Following a lively election process, here is the recently announced Board of Directors:

Udo Nothelfer, AMD
(VP Fab 36)

Tom Lantzch, ARM
(VP Marketing PIPD Division; and Consortium Treasurer)

Kevin Meyer, Chartered Semiconductor Manufacturing Ltd
(VP Industry Marketing & Platform Alliances)

Dirk Wristers, Freescale Semiconductor
(Director, Process Technology R&D)

Mark Ireland, IBM
(VP Common Platform)

André-Jacques Auberton-Hervé, Soitec
(CEO and President; and Consortium Chair)

Joel Hartmann, STMicroelectronics
(Silicon Technology Development Director)

Ken Weng, TSMC
(Deputy Director of SOI Design)

Shieh-Wei Sun, UMC
(COO)

The board manages the strategic decisions of the Consortium, determines the broad lines of the organization's activities and monitors implementation.

New Members

Now joining the 19 original founders are:

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The SOI Industry Consortium is open to any company, organization or academic institution with an interest in SOI. See the website for information on how to join: www.soiconsortium.org

Website Update

The website is an excellent resource for both Consortium members and those interested in finding out more about SOI.

Recent additions include:

Up-to-date press coverage of the consortium and SOI-related industry news;

Presentations and courses contributed by individual member companies;

Applications covered in the tech press;

Books for engineers, researchers and students.

Member Contributions *

The SOI Industry Consortium website is a great place to find relevant SOI-related materials contributed by member companies and institutions. Here are some examples - go to the website to access the complete presentations.

- HM

From IBM: An Animated Presentation on SOI & Reliability

A major advantage of SOI is its inherently better soft error reliability (SER). This is primarily caused by the increased susceptibility of circuits due to smaller geometries, decreased voltages with smaller noise margin, and reduced stored charges. Traditionally, the reliability worries due to soft errors have been focused on the memory elements; however as geometries have reached 45nm and below, the probability of a single event upset in logic circuits is very real. Logic soft errors are particularly critical because such an event produces a catastrophic system failure.

SOI has an intrinsically well-documented 5X to 10X lower soft error rate than bulk; because the buried oxide layer acts as a block for the track of electron-holes pairs to drift to the p-n junctions.

IBM's animated presentation shows the physical mechanism responsible for the significant reduction of soft errors in SOI as compared to bulk.

IBM

(Courtesy: Freescale)


From STMicroeletronics/CEA-LETI: A Short Course on RF Design in SOI

Design Corner

For RF applications, SOI offers key advantages over bulk. It provides the ability to meet the challenges of very low voltage and low noise applications, allows for improvement of passive devices and improves integration capabilities to reduce cost.

This in-depth, technical short course by Christine Raynaud of CEA-LETI / STMicroelectronics details the considerations for RF design with SOI. Over 70 slides, she covers: a comparison of thin SOI vs. bulk for RF applications; low power RF; power reduction strategies; figures of merit; design tips and techniques; analog features; bipolar devices on thin SOI; high voltage MOS on thin SOI; antenna integration; and the advantages of highresistivity (HR) SOI for increased integration.

* Legal Note: The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions.