END USER APPS
The New Game Console Generation: It’s All On SOI.
The PS3, Wii and Xbox 360 CPU design teams all chose SOI. Read why.
 
(Courtesy: Sony Computer
Entertainment Europe)		 (Courtesy: Nintendo) (Courtesy: Microsoft)
 
Hitachi’s tiny µ-chip. Now that the world’s smallest RFID chip is on SOI, you can fit a dozen under a grain of salt. Plus, productivity has increased radically.

Thanks to SOI, the newest generation of Hitachi’s µ is the world’s smallest RFID chip – far smaller than even these grains of salt. (Courtesy: Hitachi)
 
SOI Advantages.
Dr. Mitsuo Usami,
a lead developer of the Hitachi µ-chip,
explains the SOI benefits
for low-cost RFID chips.
ON THE CIRCUIT
 
Dr. Ryuta Tsuchiya of Hitachi explains the use of “thin BOX” SOI for high-speed, low-power SoCs at the 45nm node and beyond.
 
Dr. Takeshi Hamamoto of Toshiba describes how floating body RAM for SoC memory is becoming an industrial reality.
DESIGNER'S CORNER

Subramanian Iyer of IBM says that embedded DRAM on SOI is set to proliferate at the 45nm node.

A cross section of a 45nm SOI trench cell.
(Courtesy: IBM)
 
Z-RAM co-inventor Pierre Fazan of Innovative Silicon explains the technology.
E2E
 
Thomas Skotnicki of STMicroelectronics says that FD SOI with ultra-thin body & BOX could pre-empt double gate.
 
Karine Landry of Soitec looks at the 25-nm thick UT BOX the company is now sampling.
R&D OUTLOOK
 
Soitec CTO Carlos Mazure explains the benefits of ultra-thin BOX for future low-power apps.
PROFESSOR'S PERSPECTIVE
Max Lagally of U. Wisconsin-Madison and his team have developed silicon membranes for flexible, high-speed circuits.

Thin-film transistors fabricated in a strained-Si nanomembrane and transferred to PET. (Courtesy: Haochih Yuan and The Lagally Research Group)
PEOPLE
 
Laurence Malier named CEO of CEA-Leti.
 
AMD names Soitec Best Wafer Fab Materials Supplier.
 
Simon Deleonibus becomes IEEE Fellow.

FROM THE FOUNDRY

 
Dr. “LC” Hsia charts Chartered’s SOI success story.

III-V CORNER
Engineered composite substrates for GaN RF promise boost for high-volume, high-power wireless applications.
MEMS
Micralyne’s new platform makes robust, reliable SOI-MEMS faster, better, cheaper.


A MEMS optical switch mirror developed using
the Micragem fabrication process.
(Courtesy: Micralyne)
SHOPTALK
A new high-speed bonder from Mitsubishi drives packaging throughput for SOI and standard MEMS.
GUEST SPOT
 
Takashi Ogawa of Gartner/Dataquest sees firm growth ahead for SOI.
EDITORIAL
The SOI ecosystem is growing strong.