 |
|
|
|
|
LAB NEWS |
|
|
|
|
EuroSOI Gears Up for Next Programme
Network successfully federating research collaboration.
|
 |
|
|
|
Now entering its third year, the EuroSOI
Thematic Network on Silicon on Insulator
Technology, Devices and Circuits is
delivering on its charter to "federate the
existing research network on SOI topics."
It is under the aegis of the European
Commission’s research activities, which are
structured around consecutive, four-year
Framework Programmes (FP). The sixth
program, which ends this year, established
Information Society Technologies as a priority.
With FP7, the EC will be doubling its
research budget, and successful projects
such as EuroSOI that have shown they
respond to the “competitiveness and
employment needs of the EU,” are moving
into high gear.
Specifically, EuroSOI has:
• More than 100 researchers from 30
partners throughout Europe (including
universities, research labs, and leading
corporations),
• Published a state-of-the-art report and
SOI roadmap, summarizing the status
of SOI technology (from materials to
end-user applications), indicating how
Europe should react in the following
years to maintain leadership,
• Organized yearly workshops and
courses, which have become
an important event for European
researchers. This year (March 2006,
Grenoble) more than 50 papers were
accepted. The next workshop will be
organized by IMEC in 2007,
• Supported over a dozen scientific
exchanges between partners, leading to
significant results,
• Fostered collaboration with other
European projects such as SINANO,
• Created a website with excellent
resources, including links to abstracts
for over 875 relevant articles in research
journals around the world,
Recent and current projects cover
topics such as nanodevices, radio
communications, high-temperature SoCs,
low-power logic and RF wireless.
For more information, go to www.eurosoi.org.
|
|
|
|
|
|
|
|
Medea+ sSOI Partners Now Public
Program includes AMD, Freescale, Infineon, Philips and ST.
|
 |
|
|
|
The list of partners in the Medea+ Strained
Silicon-On-Insulator Substrates for High
Performance ICs program, known as
SilOnIS, has now been made public.
Among the corporate partners are AMD,
ASM, Freescale, Infineon, Philips, Siltronic
and ST, among others. Lead by Soitec,
the project’s stated goal is to "...combine
high-mobility, wafer-level strained silicon
and SOI in a single technology platform for
high performance chips."
For more information, see www.medeaplus.org/web/downloads/profiles/2T101_profile.pdf.
|
|
|
|
 |
|
