Ballistic SOI-MOSFETs:
Ultimate High-Speed CMOS Devices

by Dr. Tomohisa Mizuno
Faculty of Science, Kanagawa University, Japan, MIRAI-AIST

The carriers’ ballistic transport is a key issue for realizing future high-speed CMOS devices. At the 2004 VLSI Technology Symposium in Honolulu, we introduced a novel and high-speed SOI-MOSFET and experimentally demonstrated the transconductance enhancement as compared to strained-SOI devices.

As shown in the TEM, the source-heterojunction-MOS-transistor (SHOT) induces high-velocity electron injection from the source to the channel region by using the excess kinetic energy of the conduction-band energy offset () at the source heterojunction (see schematic band diagram).

SHOTs with source-SiGe/strained-Si-channel structures have been fabricated by Ge ion implantation into the source region after forming the MOS structure on a strained-SOI substrate. This process is very simple.

We are now trying to realize SHOTs at several 10-nm regimes, after optimizing the SHOT structures, such as the value.