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MEDEA+ T206: CMOS SOI for low power logic and RF wireless (CMOSSOI) |
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Ongoing since 2002, the
MEDEA+ T206 CMOS SOI
project is scheduled to
finish up this September.
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The objective is: “...to evaluate,
design and manufacture a
family of CMOS silicon-on-
insulator (SOI) circuits for low-power
portable, radio frequency (RF) wireless
and high-speed applications to
compete with more expensive
CMOS and bipolar CMOS
(BiCMOS) devices.”
The program, lead by
STMicroelectronics, has over 25
partners. For more information, see
http://www.medea.org/profiles/T206-final.pdf •
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ATDF MuGFET Development Program |
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In January of this year, Soitec
announced its participation as
the SOI substrate supplier in an
ATDF development program focusing
on multi-gate field effect transistor
(MuGFET) technology for the 45-nm
node and below. Soitec has now presented joint papers with Texas
Instruments and Infineon
Technologies at various technical
conferences on MuGFETs, which
are promising non-planar CMOS
transistors that improve performance
and minimize current leakage •
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Soitec Characterization Lab
Now in its third year,
Soitec’s Characterization
Lab in Bernin proposes a
whole battery of electrical and
physico-chemical tests such as
Psi-Mos, Hg-fet, CV, Box integrity,
BMD and SECCO on SOI, sSOI
and new materials. R&D researchers in the lab are developing
new characterization techniques
for future needs. The lab is audited regularly by customers, and is
ISO 9001/14001 compliant •
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EUROSOI
A preliminary public
version of the
“EUROSOI State of
the Art Report” is now available
at www.eurosoi.org.
It compiles the contributions of more
than 150 researchers/experts from
14 European countries active
in SOI technology, devices
and systems. A listing of current
European and national SOI projects
is also available on the site •
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Upcoming events |
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• 14 April 2005
(in conjunction
with Semicon Europa)
Silicon Wafers SEMI® Standards
Workshop
Presentations by Soitec, ASML,
Siltronic, Fujitsu, Infineon,
ST and others.
www.semi.org
• 14-18 June 2005
2005 Symposia on VLSI
Technology and Circuits
Rihga Royal Hotel, Kyoto, Japan
Sponsored by the Japan Society
of Applied Physics, IEEE Electron
Devices Society, Institute of
Electronics, Information and
Communication Engineers, and
the IEEE Solid-State Circuits
Society
Freescale, TSMC and Soitec will
be presenting a joint paper.
www.vlsisymposium.org
• 3-6 October 2005
2005 IEEE International SOI Conference
Hyatt Regency Resort & Spa Hotel -
Honolulu, Hawaii
“This annual meeting of
engineers and scientists provides
a forum for open discussion
in all areas of silicon-on-insulator
technologies and their
applications.”
Submission deadline:
May 6th 2005
www.soiconference.org •
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• 15-20 May 2005
207 th Meeting of The
Electrochemical Society
Quebec City, Canada
“The society for solid-state
and electrochemical science
and technology.”
Symposia of special interest
to the SOI community:
J1 - Eighth International
Symposium on Semiconductor
Wafer Bonding: Science,
Technology, and Applications
(C. E. Hunt, H. Baumgart, K. D.
Hobart, S. Bengtsson, T. Suga)
J2 - 12th International
Symposium on Silicon-on-Insulator
Technology and Devices (G. K. Celler,
S. Cristoloveanu, J. G. Fossum, F.
Gamiz, K. Izumi, Y. W. Kim)
www.electrochem.org
• 12-16 September 2005
ESSDERC-ESSCIRC
Grenoble, France
1000 participants from across
the globe are expected to attend
the European Solid-State Device
Research Conference (ESSDERC)
and Circuits Conference
(ESSCIRC). ESSDERC plenary
talk by André-Jacques
Auberton-Hervé (CEO) and
Carlos Mazuré (CTO), Soitec.
Paper submissions deadline:
9 April 2005
www.esscirc2005.com
www.essderc2005.com
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• Apple® has started shipping the
Mac® mini, which uses a G4
processor made by Freescale
in SOI.
• Pilot production of Chartered
Semiconductor Manufacturing’s
first 300-mm facility includes the
90nm SOI process tuned to
IBM’s high-performance product
needs.
• Samsung Electronics joined
the strategic semiconductor
technology development
partnership with IBM,
Chartered and Infineon focused
on 65-nm then 45-nm
technology process
development.
• The Innovative Silicon
announcement that it had
launched its SOI-based
Z-RAM™ embedded memory
technology for SoCs generated
dozens of articles in the
worldwide press.
• STMicroelectronics recently
delivered a 65-nm CMOS SoC
design platform for development
of next-generation products for
low-power, wireless, networking,
consumer, and high-speed applications. SOI extensions are at
an advanced stage of development and will be available
soon, the company said.
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• At the last Smart Networks
Developer Forum in Frankfurt,
Freescale announced three
PowerPC devices - the dual
core MPC8641D, the single
core MPC8641, and the
MPC7448 - manufactured on
90-nm SOI copper interconnect
technology.
• AMD is strengthening support
for those system designers in the
high-end, high-performance
embedded market using the
SOI-based Opteron™ and other
processors, the company said at
the last ESC.
• Geothermal researchers at
Sandia credit SOI with their
success in developing sensors
that can be placed in hotter and
higher-pressure underground
environments. This enables more
precise measurements of subterranean conditions before and
after large earthquakes occur.
• Intel has published two papers
in Nature on silicon lasers. The
first one (Nature, vol. 433, pp.
292 - 294, 20 January 2005)
describes a pulsed laser; the
second one (Nature, vol. 433,
pp. 725 - 728, 17 February
2005) describes a continuous
wave laser (an even bigger
achievement). The text and
figures in the actual Intel papers
clearly indicate that SOI
material was used in the
development of the Intel silicon
lasers •
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He thereby joins such industry luminaries as Andrew
Grove and Bernard Meyerson in receiving one of the
Electron Devices Society’s (EDS)
and IEEE’s highest honors.
Dr. Fossum’s research led to the
industry’s first SOISPICE models
for PD and FD devices, accounting
for features such as gate-gate
charge coupling and threshold
voltage dependences,
floating-body effects and transient
hysteresis. Now with the SOI
Group at the University of Florida
(Gainesville), he is developing
models for nonclassical CMOS
devices on SOI, such as the
double-gate FinFET •
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SOI By the Book
A new book, SOI Device
Technology by Makoto
Yoshimi, PhD, covers the
history of SOI, the floating
body effect and a variety
of LSI applications.
Language: Japanese
Publisher: ED Research, Co. (Tokyo, Japan)
www.edresearch.co.jp/FocusRepo/soi.html
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An SOI pioneer (he began
his research over 20 years
ago for Toshiba), Makoto
Yoshimi is now Chief Scientist of Soitec Asia. “This book describes
what SOI is all about”, he says,
“and provides an introduction for device
engineers and graduate students.”
Dr. Shigeto Maegawa of Renesas
Technology Corp. (Japan) notes
that the book “…captures the
enthusiasm of the engineers
who worked so tenaciously
to make SOI a reality.” •
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Here’s a quick review
of some recent
Smart Cut activity. |
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March 2005 - WORLD’S FIRST
GALLIUM NITRIDE (GaN)-ON-
INSULATOR SUBSTRATE
Soitec announced that its Smart
Cut technology was used to split
and transfer a thin layer of GaN
from a high-quality GaN donor
wafer onto a carrier wafer—
generating the world’s first single-
crystal, thin-film gallium nitride
(GaN)-on-insulator substrate. This
represents a critical step forward
in enabling the development of
high-performance blue and white
light-emitting diodes (LEDs), as
well as for improving current and
future device performance in
radio-frequency (RF) and discrete
power applications
January 2005 - SOITEC SIGNS
MULTI-YEAR AGREEMENT
WITH AMD FOR THE SUPPLY
OF UNIBOND™ SOI WAFERS
Soitec announced a multi-year
agreement to supply AMD with
both 200- and 300-mm SOI
wafers, manufactured using
Soitec’s proprietary Smart Cut™
process. The agreement is
projected to be worth more than
$50 million for 2005 alone.
December 2004 - SOITEC
GROUP AND ASM INTERNATIONAL
PRODUCE FIRST INDUSTRIALLY
MANUFACTURED 300-MM
STRAINED SOI SUBSTRATES
The Soitec Group and ASM
International N.V. announced
samples of the industry’s first
industrially manufactured 300-mm
sSOI wafers. Soitec and ASM
also announced the extension of
their partnership to next-generation
sSOI products •
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