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SemiWiki: FD-SOI’s the Technology to Continue Moore’s Law

Posted on March 26, 2014
In Industry Buzz
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A new SemiWiki post by Dr. Eric Esteve of IPnest entitled, The Technology to Continue Moore’s Law… (click here to read it) argues that FD-SOI is the right choice.  He explores cost and manufacturing considerations, and looks at the design issues in logic, memories and analog.  A highly recommended read.

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FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance Thumbnail

FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance

Posted by and on March 26, 2014
In Design & Manufacturing, News & Viewpoints
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By Bich-Yen Nguyen and Christophe Maleville (Soitec) We are in the era of mobile computing with smart handheld devices and remote data storage “in the cloud,” with devices that are almost always on and driven by needs of high data transmission rate, instant access/connection and long battery life.  With all the ambitious requirements for better […]

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Semicon Europa 2014 Comes to Grenoble, Issues Call for Papers Thumbnail

Semicon Europa 2014 Comes to Grenoble, Issues Call for Papers

Posted on March 19, 2014
In Industry Buzz
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For the first time, SEMICON Europa will be held in Grenoble, France. The greater Grenoble region is home to industry leaders leveraging and researching SOI and related advanced substrates, including Soitec, Leti and  ST. SEMI has now announced the “Call for Papers” for technical sessions and presentations for SEMICON Europa 2014, which takes place October […]

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ST Article in EETimes Details How FD-SOI Supports Moore’s Law Thumbnail

ST Article in EETimes Details How FD-SOI Supports Moore’s Law

Posted on March 19, 2014
In Industry Buzz
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  A powerful, detailed article in EETimes-Asia details how FD-SOI Supports Moore’s Law (click here to read it).  Written by Laurent Remont, ST’s VP and GM for Technology and Product Strategy, Embedded Processing Solutions, it explores FD-SOI’s advantages in terms of price, power and performance versus planar bulk CMOS and FinFETs and 28nm and 14nm. Remont […]

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FD-SOI Keeps Moore’s Law on Track Thumbnail

FD-SOI Keeps Moore’s Law on Track

Posted by on February 28, 2014
In Editor's Blog, News & Viewpoints
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Take a look at this graph – it’s obvious, isn’t it? FD-SOI is significantly cheaper, outdoes planar bulk and matches bulk FinFET in the performance/power ratio, and keeps the industry on track with Moore’s Law. This was part of a presentation by ST’s Joël Hartmann (EVP of Manufacturing and Process R&D, Embedded Processing Solutions) during Semi’s […]

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Excellent ARM TechCon Video on FD-SOI Design by ST Posted on Synopsys Site Thumbnail

Excellent ARM TechCon Video on FD-SOI Design by ST Posted on Synopsys Site

Posted on February 20, 2014
In Industry Buzz
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(Courtesy: Synopsys, STMicroelectronics, ARM) An excellent ARM TechCon 2013 video on FD-SOI for designers is now posted on the Synopsys site. David Jacquet from ST shares the company’s FD-SOI approach to delivering optimized energy efficient solutions for the SoC market. Jacquet currently leads ST’s architecture activities for energy efficient high performance CPU/GPU implementations. In his […]

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EU report: SOI-based technologies should play important role in capturing new markets

Posted on February 20, 2014
In Industry Buzz
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“High performing low power digital technology based on SOI” is an important part of the detailed plan submitted February 14th by the Electronics Leaders’ Group (ELG) to European Commission Vice-President Neelie Kroes.  (Press release here.) The group recommends the EU focus on: Areas were Europe is strong – automotive, energy, industrial automation and security. The […]

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FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range Thumbnail

FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range

Posted by on February 20, 2014
In Conferences, Design & Manufacturing, Editor's Blog, R&D/Labnews
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Body-biasing design techniques, uniquely available in FD-SOI, have allowed STMicroelectronics and CEA-Leti to demonstrate a DSP that runs 10x faster than anything the industry’s seen before at ultra-low voltages (read press release here). In the mobile world (not to mention the IoT), the role of DSPs is becoming ever more important. All those things you […]

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Leti, ST Demo Order-of-Magnitude-Faster, Ultra-Low Power DSP on 28nm FD-SOI

Posted on February 18, 2014
In Industry Buzz
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CEA-Leti and STMicroelectronics presented an order-of-magnitude-faster FD-SOI Ultra-Wide-Voltage Range (UWVR) DSP at ISSCC ’14. The device was produced by ST in 28nm UTBB FD-SOI. It allows body-bias-voltage scaling from 0V to +2V, decreases minimum circuit operating voltage and supports clock-frequency operation of 460MHz at 400mV. “This demonstration DSP shows that FD-SOI is blazing the trail […]

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IP for FD-SOI: Examples from ST Thumbnail

IP for FD-SOI: Examples from ST

Posted by on February 14, 2014
In Design & Manufacturing, Editor's Blog
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Interested in energy-efficient SOCs? At the IP-SOC Conference last fall, STMicroelectronics’ Giorgio Cesana presented examples of the technological competitiveness of FD-SOI IP for memories, cores, ultra-low voltage and analog. Here’s a brief recap. The complete presentation, entitled “FD-SOI Technology for Energy-Efficient SoCs: IP Development Examples” is available on the Design & Reuse website (click here […]

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