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New interactive webinar on FD-SOI design posted by CMC Thumbnail

New interactive webinar on FD-SOI design posted by CMC

Posted on January 12, 2015
In Industry Buzz
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A new interactive WebEx webinar on FD-SOI design sponsored by CMC Microsystems has been posted. Entitled Design and Characterization of Circuits and Devices in the ST 28nm Fully-Depleted Silicon-On-Insulator (FD SOI) (click here to view it), it features two presentations by University of Toronto professors based on their recent experiences with circuit design in the ST’s […]

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SOI for MEMS, NEMS, sensors and more at IEDM ’14 (Part 3 of 3 in ASN’s IEDM coverage) Thumbnail

SOI for MEMS, NEMS, sensors and more at IEDM ’14 (Part 3 of 3 in ASN’s IEDM coverage)

Posted by on January 12, 2015
In Conferences, Paperlinks, R&D/Labnews
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Important SOI-based developments in MEMS, NEMS (like MEMS but N for nano), sensors and energy harvesting shared the spotlight with advanced CMOS and future devices at IEDM 2014 (15-17 December in San Francisco). IEDM is the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. Here in Part 3, we’ll […]

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IEEE SOI-3D-Substhreshold (S3S) Conference Issues Call for Papers

Posted on January 9, 2015
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The IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S) has issued the 2015 Call for Papers. Now in its 3rd year as a combined event, the 2015 IEEE S3S Conference will take place in Sonoma Valley, CA, just north of San Francisco, October 5-8. This industry-wide event will gather together widely known experts, contributed papers and […]

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SOI-based future device structures at IEDM ’14 (Part 2 of 3 in ASN’s IEDM coverage) Thumbnail

SOI-based future device structures at IEDM ’14 (Part 2 of 3 in ASN’s IEDM coverage)

Posted by on January 9, 2015
In Conferences, Paperlinks, R&D/Labnews
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Beyond FD-SOI and FinFETs, important SOI-based developments in advanced device architectures including nanowires (NW), gate all around (GAA) and other FET structures shared the spotlight at IEDM 2014 (15-17 December in San Francisco). IEDM is the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. Here in Part 2 of […]

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10nm FD-SOI, SOI FinFETs at IEDM ’14 (Part 1 of 3 in ASN’s IEDM coverage) Thumbnail

10nm FD-SOI, SOI FinFETs at IEDM ’14 (Part 1 of 3 in ASN’s IEDM coverage)

Posted by on December 31, 2014
In Conferences, Paperlinks, R&D/Labnews
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FD-SOI at 10nm (and other nodes) as well as SOI FinFETs shared the spotlight at IEDM 2014 (15-17 December in San Francisco), the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. There were about 40 SOI-based papers presented at IEDM. Here in Part 1 of ASN’s IEDM coverage, we […]

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Simgui gets exclusive on distribution of Soitec 200mm SOI wafers in China

Posted on December 9, 2014
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Under a new agreement, Simgui now has the exclusive right to promote, distribute and sell Soitec’s 200-mm SOI wafers in China (see press release in English here; Chinese version here). Soitec is the world’s leading producer of SOI wafers. Shanghai Simgui Technology Co., Ltd. (Simgui), a Shanghai-based semiconductor materials company, is a spinoff of the Shanghai Institute […]

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Two additions to Altatech equipment lines: 10x faster ultra-thin film deposition; Doppler nano-defect inspection captures true sizing and positioning Thumbnail

Two additions to Altatech equipment lines: 10x faster ultra-thin film deposition; Doppler nano-defect inspection captures true sizing and positioning

Posted on December 8, 2014
In Industry Buzz
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Two new products from semi equipment manufacturer Altatech: one for ultra-thin film deposition, and one for searching out nano-defects. Altatech is a division of Soitec, best known in the advanced substrates community for its leadership in SOI wafers. This part of the company, however, develops highly efficient, cost-effective inspection and chemical vapor deposition (CVD) technologies […]

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SOI-3D-SubVt (S3S): three central technologies for tomorrow’s mainstream applications Thumbnail

SOI-3D-SubVt (S3S): three central technologies for tomorrow’s mainstream applications

Posted by and on November 3, 2014
In Conferences
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ST further accelerates its FD-SOI ROs* by 2ps/stage, and reduces SRAM’s VMIN by an extra 70mV. IBM shows an apple-to-apple comparison of 10nm FinFETs on Bulk and SOI. AIST improves the energy efficiency of its FPGA by more than 10X and Nikon shows 2 wafers can be bonded with an overlay accuracy better than 250nm. […]

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MegaChips Buys SOI-MEMS Timing Leader SiTime

Posted on November 3, 2014
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SOI-MEMS timing device leader SiTime Corporation is being acquired by MegaChips Corporation, a top 25 fabless semiconductor company based in Japan for $200 million in cash. (read the press release here). This transaction combines two complementary fabless semiconductor leaders that provide solutions for the growing Wearables, Mobile and Internet of Things markets. “MEMS components are fuelling […]

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IntelliEPI Buys Soitec GaAs Business

Posted on November 3, 2014
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Soitec, a leader in SOI wafers and other advanced substrates, recently announced the sale of its gallium arsenide (GaAs) epitaxy business (the Soitec Specialty Electronics subsidiary) to Intelligent Epitaxy Technology Inc (see press release here).  The deal follows the previous collaboration between Soitec and IntelliEPI (see press release dated December 12, 2013). “The sale of […]

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