ASN

Archive of Renesas

ST’s Cesana Further Explains FD-SOI Biasing & More in On-line Discussions and LinkedIn Groups Thumbnail

ST’s Cesana Further Explains FD-SOI Biasing & More in On-line Discussions and LinkedIn Groups

Posted by on February 4, 2013
In Editor's Blog
Tagged with , , , , , , , , , , , , , , , , , , , , , ,

The YouTube video Introduction to FD-SOI by STMicroelectronics and ST-Ericsson has generated enormous coverage in the press as well as in-depth discussions across various user groups in LinkedIn.  In its first two weeks, it had over 3000 YouTube views, and LinkedIn postings of it generated over 50 Likes and Comments in a single group. As …

Continue ReadingLeave a Comment
Renesas Technology announced that it has developed a high-density capacitorless “floating body” twin-transistor RAM Thumbnail

Renesas Technology announced that it has developed a high-density capacitorless “floating body” twin-transistor RAM

Posted on December 7, 2005
In Industry Buzz
Tagged with , ,

• Renesas Technology announced that it has developed a high-density capacitorless “floating body” twin-transistor RAM (TTRAM), which it says will allow fast, high density storage to be embedded in power-efficient system-on-a-chip devices built with 65-nm SOI CMOS.

Continue ReadingLeave a Comment

Renesas is licensing Sarnoff’s TakeCharge®

Posted on July 11, 2005
In Industry Buzz
Tagged with , ,

• Renesas is licensing Sarnoff’s TakeCharge® ESD technology to help accelerate the development of advanced system LSI devices applying SOI processes.

Continue ReadingLeave a Comment

In conjunction with Renesas, Hitachi has developed a new SOI transistor

Posted on July 11, 2005
In Industry Buzz
Tagged with , , ,

• In conjunction with Renesas, Hitachi has developed a new SOI transistor which it says improves speed and lowers power consumption for processes beyond the 65-nm technology node.

Continue ReadingLeave a Comment