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Archive of Renesas

FD-SOI Front and Center at Very Successful Semicon Europa Thumbnail

FD-SOI Front and Center at Very Successful Semicon Europa

Posted by on October 17, 2014
In Conferences, Editor's Blog
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Yes, GlobalFoundries is hot on FD-SOI. Yes, Qualcomm’s interested in it for IoT. Yes, ST’s got more amazing low-power FD-SOI results. These are just some of the highlights that came out of the Low Power Conference during Semicon Europa in Grenoble, France (7-9 October 2014). This was Semicon Europa’s first time in Grenoble, the heart […]

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SOI: Looking Back Over a Year of Moving Forward (Part 1, FD-SOI) Thumbnail

SOI: Looking Back Over a Year of Moving Forward (Part 1, FD-SOI)

Posted by on January 13, 2014
In Editor's Blog, News & Viewpoints
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2014′s going to be a terrific year for the greater SOI community, with 28nm FD-SOI ramping in volume and 14nm debuting, plus RF-SOI continuing its stellar rise. But before we look forward (which we’ll do in an upcoming post), let’s consider where we’ve been and some of the highlights of the last year.  In fact, […]

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The FD-SOI Papers at IEDM ’13 Thumbnail

The FD-SOI Papers at IEDM ’13

Posted by on December 16, 2013
In Conferences, Editor's Blog, Paperlinks
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FD-SOI was a hot topic at this year’s IEEE International Electron Devices Meeting (IEDM) (www.ieee-iedm.org), the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. The FD-SOI papers featured high performance, low leakage, ultra-low power (0.4V),  excellent variability, reliability and scalability down to the 10 nm node using thin SOI […]

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FinFET vs. FD-SOI at IEDM (EETimes)

Posted on October 31, 2013
In Industry Buzz
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EETimes predicts a FD-SOI vs. FinFET showdown at the upcoming IEDM conference. At Session 9 on advanced CMOS platforms TSMC will provide details on the company’s 16nm bulk FinFET CMOS process, followed by a paper on the 14nm FD-SOI process by STMicroelectronics, Soitec, Leti, IBM, GlobalFoundries, and Renesas.

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ST’s Cesana Further Explains FD-SOI Biasing & More in On-line Discussions and LinkedIn Groups Thumbnail

ST’s Cesana Further Explains FD-SOI Biasing & More in On-line Discussions and LinkedIn Groups

Posted by on February 4, 2013
In Editor's Blog
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The YouTube video Introduction to FD-SOI by STMicroelectronics and ST-Ericsson has generated enormous coverage in the press as well as in-depth discussions across various user groups in LinkedIn.  In its first two weeks, it had over 3000 YouTube views, and LinkedIn postings of it generated over 50 Likes and Comments in a single group. As […]

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Renesas Technology announced that it has developed a high-density capacitorless “floating body” twin-transistor RAM Thumbnail

Renesas Technology announced that it has developed a high-density capacitorless “floating body” twin-transistor RAM

Posted on December 7, 2005
In Industry Buzz
Tagged with , ,

• Renesas Technology announced that it has developed a high-density capacitorless “floating body” twin-transistor RAM (TTRAM), which it says will allow fast, high density storage to be embedded in power-efficient system-on-a-chip devices built with 65-nm SOI CMOS.

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Renesas is licensing Sarnoff’s TakeCharge®

Posted on July 11, 2005
In Industry Buzz
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• Renesas is licensing Sarnoff’s TakeCharge® ESD technology to help accelerate the development of advanced system LSI devices applying SOI processes.

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In conjunction with Renesas, Hitachi has developed a new SOI transistor

Posted on July 11, 2005
In Industry Buzz
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• In conjunction with Renesas, Hitachi has developed a new SOI transistor which it says improves speed and lowers power consumption for processes beyond the 65-nm technology node.

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