Look for some breakthrough FD-SOI and other excellent SOI-based papers coming out of the 2013 Symposia on VLSI Technology and Circuits in Kyoto (June 10-14). By way of explanation, VSLI comprises two symposia: one on Technology; one on Circuits. However, papers that are relevant to both are presented in “Jumbo Joint Focus” sessions. Here’s a …

SOI and other advanced substrate based technologies will be significant beneficiaries of the European Commission’s “New European Industrial Strategy for Electronics”, targeting the mobilization of €100 billion in new private investments. In addition to the recently announced €360M FD-SOI Places2Be project (which stands for Pilot Lines for Advanced CMOS Enhanced by SOI in 2x nodes, …

Dr. Jean-Pierre Colinge received the 2012 IEEE Andrew S. Grove award at the last ESSDERC-ESSCIRC Conference, for his “contributions to silicon-on-insulator devices and technology.” One of the industry’s most prestigious, the Grove Award is sponsored by the IEEE Electron Devices Society, recognizing “outstanding contributions to solid-state devices and technology.” As noted in the EDS Newsletter, …

The FD-SOI design and manufacturing ecosystem has just gotten a €360M boost. A new 3-year public-private project involving 500 engineers from 19 members in seven countries is looking to enable volume manufacturing in Europe from 28nm down to 10nm. The Places2Be project (which stands for Pilot Lines for Advanced CMOS Enhanced by SOI in 2x …

Fully-depleted transistor technologies, both planar and fin-type, are now in the mainstream for product designs. One of the many interesting topics in the new 3D FinFET technology is the approach to isolation. In this article, key elements that differentiate junction-isolated (bulk) and dielectric-isolated (SOI) FinFET transistors are discussed, encompassing aspects of process integration, device design, …

DARPA reports that a team of researchers at the University of Southern California and Columbia University has achieved output power levels of nearly 0.5W at 45 GHz with a 45nm SOI CMOS chip. This world record result for CMOS-based power amplifiers doubles output power compared to the next best reported CMOS millimeter-wave power amplifier. The …

The 2013 Common Platform Technology Forum showcased “the latest technological advances being delivered to the world’s leading electronics companies,” so of course SOI-based topics were well-represented. Happily, those of us who weren’t able to get over to Silicon Valley were able to attend “virtually” via a live stream (which is now reposted – click here …

For their work on FD-SOI, four researchers from STMicroelectronics and Leti have received the 2012 Général Ferrié Award, considered the highest award in electronics R&D in France.  Claire Fenouillet-Béranger and Olivier Faynot from Leti, and Stéphane Monfray and Frédéric Bœuf from ST are credited with validating the technological choice for FD-SOI, while also enabling its …

Starting on SOI, the Paul Scherrer Institute reports in Nature that they have achieved strained silicon nanowires with the highest strain ever (4.5% elastic strain). The principle of the method used for achieving a high stress in silicon: Firstly, the forces act in all directions in the silicon layer. If small parts of the layer …

Taking a new approach to SOI-MEMS, researchers from the NIST Center for Nanoscale Science and Technology have developed a nanophotonic motion sensor.  Enabled by cavity optomechanics, it can measure the mechanical motion between two nanofabricated structures with a precision close to the fundamental limit imposed by quantum mechanics. Fabricated on a silicon chip at low …