Bulk logic designs for mobile apps port directly to FD-SOI
Posted by Jean-Luc PELLOIE (ARM) on November 4, 2011In ASN #18, Design & Manufacturing, In & Around Our Industry
Tagged with 20/22nm, ARM, Cadence, design, EDA, embedded, FD-SOI, low-power, Magma, Mentor, SOC
Bulk logic designs can be ported directly to FD-SOI for high-performing, low-power mobile apps. Fully-depleted (FD)-SOI is a potential alternative to BULK 20nm. But what sort of the impact will that have on the design flow? The short answer is: very little. Designs for low-power mobile applications in 28nm bulk benefit significantly in terms of …
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