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Silicon Valley FD-SOI Symposium Promises Best Ecosystem Line-Up Ever: ARM, Foundries, EDA, Designers, Experts & Users (13 April – free and open to all who sign up) Thumbnail

Silicon Valley FD-SOI Symposium Promises Best Ecosystem Line-Up Ever: ARM, Foundries, EDA, Designers, Experts & Users (13 April – free and open to all who sign up)

Posted by on March 31, 2016
In Conferences, Design & Manufacturing, Editor's Blog
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The SOI Consortium has lined up an excellent, comprehensive FD-SOI Symposium on April 13th in San Jose. They’ll be highlighting the tremendous progress of the FD-SOI ecosystem. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries, EDA companies, design partners, chipmakers and analysts. There is a special session dedicated to RF […]

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What’s Behind the Power Savings in sureCore’s FD-SOI SRAM IP? Thumbnail

What’s Behind the Power Savings in sureCore’s FD-SOI SRAM IP?

Posted by on February 12, 2016
In Design & Manufacturing
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By Duncan Bremner, CTO SureCore Limited Editor’s note: sureCore just announced availability of its 28nm FD-SOI memory compiler (press release here), which supports the company’s low-power, Single and Dual Port SRAM IP. Here, the company’s CTO explains why this IP is getting such impressive results. ~ ~ ~ Recently, sureCore announced results from a 28nm FD-SOI test chip that […]

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Call for submissions to FD-SOI IP Workshops (prizes!): Dresden (March), Bangalore (April), Shanghai (Sept), Grenoble (Dec)

Posted on February 3, 2016
In Industry Buzz
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  Design & Reuse, in partnership with GlobalFoundries, ST, Soitec and Leti, is sponsoring a series of FD-SOI IP Workshops around the globe. (Click here for more information.) These working days aim at sharing information about IP that’s currently available or is being designed for FD-SOI technology. The first conference will take place during DATE […]

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Yes, 28nm FD-SOI Silicon Is Running (Samsung Interview, Part 1 of 3) Thumbnail

Yes, 28nm FD-SOI Silicon Is Running (Samsung Interview, Part 1 of 3)

Posted by on December 19, 2015
In Design & Manufacturing, News & Viewpoints, SOI In Action
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ASN spoke with Kelvin Low, senior director of marketing for Samsung Foundry and Axel Fischer, director of Samsung System LSI business in Europe about the company’s FD-SOI offering. Here in part 1, we’ll talk about technology readiness. In parts 2 and 3, we’ll talk about design and the ecosystem. ~ ~ ~ ASN: Where does […]

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Yes! FD-SOI IP Ready for GF, Samsung; Ecosystem Now a Force to Be Reckoned With Thumbnail

Yes! FD-SOI IP Ready for GF, Samsung; Ecosystem Now a Force to Be Reckoned With

Posted by on July 6, 2015
In Conferences, Design & Manufacturing, Editor's Blog
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The recent LetiDays FD-SOI workshop in Grenoble was the biggest show of force to date for the burgeoning FD-SOI ecosystem. In addition to a raft of excellent presentations, we learned two very big pieces of news. First, GlobalFoundries provided more insights into their upcoming FD-SOI offering. And second, designers opting for Samsung’s 28nm FD-SOI offering […]

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Top Silicon Valley Companies Signed Up for FD-SOI & RF-SOI Forum (27 Feb. 2015 in SF, free, registration still open) Thumbnail

Top Silicon Valley Companies Signed Up for FD-SOI & RF-SOI Forum (27 Feb. 2015 in SF, free, registration still open)

Posted by on February 23, 2015
In Conferences, Editor's Blog
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Name a top Silicon Valley company, and you’ll probably find it on the attendance list of the upcoming FD-SOI & RF-SOI Forum in San Francisco. At the time of this posting, people from over 65 companies are among the hundreds who’ve signed up for this free, all-day event. If you haven’t yet, you can still […]

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On FD-SOI, Surecore’s ULP SRAM Saves 70% Power; Company Raised $1.6 Million (SemiEngineering)

Posted on February 23, 2015
In Industry Buzz
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SureCore’s ultra-low power SRAM technology on 28nm FD-SOI saves 70% in read/write power and reduces leakage by 30% compared to 40nm bulk implementations, writes SemiconductorEngineering Editor-In-Chief Ed Sperling (read the article here). Hitting the sweet spot for mobile, IoT and wearables, SureCore recently raised $1.6 million in funding.

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ST video from IP-SoC on European FD-SOI ecosystem projects posted on YouTube Thumbnail

ST video from IP-SoC on European FD-SOI ecosystem projects posted on YouTube

Posted on February 9, 2015
In Industry Buzz
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A video made during ST’s FD-SOI presentation at IP-SoC 2014 has now been posted by designreuse on YouTube (you can see it here). Over 40 minutes long, it details the European THINGS2DO project, which includes almost 50 partners working on the FD-SOI ecosystem. (This follows onto the PLACES2BE project, which is finishing up this year.) […]

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Tokyo FD-SOI/RF-SOI Workshop (part 2): Sony 1mW FD-SOI GPS steals the show, but great presentations from EDA & design houses, too Thumbnail

Tokyo FD-SOI/RF-SOI Workshop (part 2): Sony 1mW FD-SOI GPS steals the show, but great presentations from EDA & design houses, too

Posted by on February 9, 2015
In Design & Manufacturing, Editor's Blog
Tagged with , , , , , , , , , , , , , , , , , , , , ,

The Sony presentation on a 28nm FD-SOI GPS chip for an IoT app, which cut power by 10x (down to 1mW), has gained enormous traction worldwide.  However, that was just one of a dozen excellent presentations made by industry leaders at the recent FD-SOI/RF-SOI workshop in Tokyo. In part 1 of ASN’s coverage of the […]

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More FD-SOI myth-busting, courtesy semiwiki

Posted on September 11, 2014
In Industry Buzz
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In his recent piece, A couple of misconceptions about FD-SOI (3 September 2014), semiwiki blogger and IP expert Eric Esteve corrects some assertions surfacing about FD-SOI.  He reminds designers that to really benefit from FD-SOI, you want to leverage body-biasing. He explains how ST has automated the IP conversion process so it takes about half […]

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