The Move to Fully-Depleted
• FD-SOI: ST/Chery interview; CMP's MPW runs; IBS on cost-savings
• FD & wafers: SEH & Soitec
• IBM's Fin-on-Oxide/FinFET
• SOI Consortium – FD-SOI & wafer capacity for mobile
FD-SOI Industrialization
• Technology: ST/Soitec white paper excerpts
• Apps – ST-Ericsson's NovaThor at 28nm (interview)
• 20nm & Beyond: Chenming Hu; Leti
• Wafers: Soitec's Roadmap
• SOI Consortium – benchmarking
SOI on the Roadmaps
• FD-SOI: ST & 28nm SOCs; ARM & design porting
• Apps – NXP automotive sensors, AMD 32nm Bulldozer
• SOI Conference (IBM, Intel, Leti, GloFo, ST, ARM, Peregrine & more)
• SOI Consortium – FD-SOI whitepaper overview & excerpts
FD-SOI: The Right Choice & more
• Planar FD-SOI - wafers, Consortium update
• Apps – Xbox 360 CPU/GPU, ST/power
• GlobalFoundries on ESD
• Wafer stacking, MEMS, photonics & more
Honeywell Aerospace has introduced the HXSR06432, a high-performance SRAM on 150nm SOI. It is designed for use in low voltage systems operating in radiation sensitive environments.
Continue ReadingLeave a CommentDeveloped under the US DOE’s Deep Trek Program, Honeywell Aerospace’ new SOI-based HTOP01 is designed for both jet engine instrumentation and control, as well as the oil industry’s deep drilling operations.
Continue ReadingLeave a Comment• Honeywell is rolling out a roster of SOI-based, 150nm rad-hard chips, fabricated at its new, DoD-accredited fab in Plymouth, Minnesota: – the HXSRO1608, the first 16-million bit SRAM for radiation-tolerant and radiation-hardened applications. – the HXNV0100, the world’s first one-million bit non-volatile MRAM for strategic space electronics applications. – the HX5000 , the world’s …
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Honeywell has sent SOI by Jupiter and to Mars. Now its SOI rad-hard foundry services are charting new frontiers with the industry’s first 150 nm rad-hard, digital ASIC solutions and more. Honeywell’s path runs parallel to commercial markets. Chips destined for space are increasingly facing the same performance vs. power issues of chips we find …
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Honeywell has worked with the top EDA tool vendors to develop the SOI process design kits (PDKs) needed by both in-house designers and foundry customers. Rick Veres, Honeywell EDA Manager, explains. ASIC Design With Pilot Flow For digital rad-hard ASIC design, we worked with Synopsys to adapt the Pilot Design Environment to our process. The …
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The widening availability of tools and services is good news for designers in the fabless/foundry arena considering the move to SOI. Leading foundries have made the investments in manufacturing on SOI. Those that have taken the final steps – finalizing electrical characterization, constructing SPICE models, integrating design tools and building libraries – are winning business. …
Continue ReadingLeave a Comment• Honeywell International opened its new Minneapolis fab, which will produce the industry’s first radiation-hardened, 0.15-micron ASICs, based on SOI technology co-developed with Cypress Semiconductor.
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