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Archive of high-perf

FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range Thumbnail

FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range

Posted by on February 20, 2014
In Conferences, Design & Manufacturing, Editor's Blog, R&D/Labnews
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Body-biasing design techniques, uniquely available in FD-SOI, have allowed STMicroelectronics and CEA-Leti to demonstrate a DSP that runs 10x faster than anything the industry’s seen before at ultra-low voltages (read press release here). In the mobile world (not to mention the IoT), the role of DSPs is becoming ever more important. All those things you […]

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New FD-SOI Presentation by ST on Design & Reuse Looks at Cost, IP Thumbnail

New FD-SOI Presentation by ST on Design & Reuse Looks at Cost, IP

Posted on November 18, 2013
In Industry Buzz
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Design & Reuse has posted an excellent presentation by Giorgio Cesana of ST entitled FD-SOI Technology for Energy Efficient SoCs: IP Development Examples (click here). It explains why the technology is faster-cooler-simpler – and more cost effective. After a quick tour of the tech basics, Cesana gets into cost/performance ratios, comparing the technology to bulk […]

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AMD’s second generation A-Series Accelerated Processing Units is now available in retail and distribution channels

Posted on October 9, 2012
In Industry Buzz
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Based again on 32nm SOI, AMD‘s second generation A-Series Accelerated Processing Units (APUs) (formerly codenamed “Trinity”) for mainstream and ultrathin notebooks, All-in-One and traditional desktops, home theater PCs and embedded designs is now available in retail and distribution channels. The new x86 cores, codenamed “Piledriver,” are an evolution of the revolutionary “Bulldozer” cores with some […]

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EXCLUSIVE ASN INTERVIEW: ST’s Jean-Marc Chery on FD-SOI Manufacturing Thumbnail

EXCLUSIVE ASN INTERVIEW: ST’s Jean-Marc Chery on FD-SOI Manufacturing

Posted on October 1, 2012
In ASN #20, News & Viewpoints, SOI In Action
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In the spring of 2012, STMicroelectronics announced the company would be manufacturing ST-Ericsson’s next-generation (and very successful) NovaThor ARM-based smartphone/tablet processors using 28nm FD-SOI process technology. With first samples coming out this fall, ASN talks to Jean-Marc Chery, Executive Vice President, General Manager Digital Sector, Chief Technology & Manufacturing Officer, STMicroelectronics about the manufacturing process […]

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Roundup: FD-SOI & Ecosystem Shine at Semicon West Thumbnail

Roundup: FD-SOI & Ecosystem Shine at Semicon West

Posted by on July 16, 2012
In Editor's Blog
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A major highlight at this year’s Semicon West in San Francisco was a panel discussion by industry thought-leaders gathered to discuss the current challenges facing the mobile industry.  It was an impressive line-up of key players from the ecosystem at the forefront of fully-depleted, SOI based technologies, including: ARM: Ron Moore – Director of Strategic […]

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GlobalFoundries to Fab 28/20nm FD-SOI Chips for ST; ST Technology Open to Other GF Customers Thumbnail

GlobalFoundries to Fab 28/20nm FD-SOI Chips for ST; ST Technology Open to Other GF Customers

Posted by on June 13, 2012
In Editor's Blog
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Two big pieces of news have just been announced by STMicroelectronics: to supplement in-house production at Crolles, the company has tapped GlobalFoundries for high-volume production of 28nm then 20nm FD-SOI mobile devices; ST will open access to its FD-SOI technology to GlobalFoundries’ other customers. The high-volume manufacturing will kick off with ST-Ericsson’s ARM-based 28nm NovaThor. […]

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NovaThor SmartPhone Chip on 28nm FD-SOI: ST-Ericsson Blogger Tells All; PC Mag Sees Light Thumbnail

NovaThor SmartPhone Chip on 28nm FD-SOI: ST-Ericsson Blogger Tells All; PC Mag Sees Light

Posted by on May 30, 2012
In Editor's Blog
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To paraphrase the song, “What a difference a day would make.”  Searching to plug into the nearest power strip each afternoon, active smartphone users would certainly agree with that. But ST-Ericsson’s next-gen NovaThor chips on 28nm FD-SOI (available for design now), which are looking to get an extra day out of your battery, should put […]

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Leti: Adding Strain to FD-SOI for 20nm and Beyond Thumbnail

Leti: Adding Strain to FD-SOI for 20nm and Beyond

Posted by and (CEA-Leti) on April 30, 2012
In Advanced Substrate Corners, ASN #19, R&D/Labnews
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Work at Leti shows that strain is an effective booster for high-performance at future nodes. The outstanding electrostatic performance already reported for planar FD-SOI technology can be improved by the use of ION boosters in order to target-high performance applications, as already demonstrated in the past. As illustrated in Figure 1, strain can be incorporated […]

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ST White Paper Excerpts: Planar Fully-Depleted Silicon Technology to Design Competitive SOCs at 28nm and Beyond Thumbnail

ST White Paper Excerpts: Planar Fully-Depleted Silicon Technology to Design Competitive SOCs at 28nm and Beyond

Posted by , and (Soitec) on April 24, 2012
In ASN #19, Design & Manufacturing, In & Around Our Industry
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STMicroelectronics recently issued a major white paper detailing the choice of FD-SOI for consumer SOCs at 28nm and beyond. This article excerpts some of the highlights. From “Planar Fully-Depleted Silicon Technology to Design Competitive SOC at 28nm and Beyond” (White paper by STMicroelectronics and Soitec): “ FD-SOI Executive Summary Planar FD is a promising technology […]

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Chenming Hu: SOI Can Empower New Transistors to 10nm and beyond Thumbnail

Chenming Hu: SOI Can Empower New Transistors to 10nm and beyond

Posted by (UC Berkeley) on April 23, 2012
In Advanced Substrate Corners, ASN #19, Professor's Perspective
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FinFET and FD-SOI transistors look different but share a common principal that allows MOSFETs to be scalable to 10nm gate length. The good, old MOSFET is nearing its limits. Scaling issues and dopant-induced variations are leading to high leakage (Ioff) and supply voltage (Vdd),  resulting in excessive  power consumption and design costs. While these challenges […]

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