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Archive of FinFET

Samsung/ChipEstimate video gives strong plug for FD-SOI Thumbnail

Samsung/ChipEstimate video gives strong plug for FD-SOI

Posted on April 9, 2015
In Industry Buzz
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In a new YouTube video, Samsung’s Sr. Director of Foundry Marketing, Kelvin Low, makes a strong case for 28nm FD-SOI, especially for ultra-low-power, IoT, wearables, networking and automotive apps. The five-minute video was taped by ChipEstimate.TV host Sean O’Kane during the Cadence User Conference (CDNLive, Silicon Valley, March 2015 – click here to see it). […]

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SOI for MEMS, NEMS, sensors and more at IEDM ’14 (Part 3 of 3 in ASN’s IEDM coverage) Thumbnail

SOI for MEMS, NEMS, sensors and more at IEDM ’14 (Part 3 of 3 in ASN’s IEDM coverage)

Posted by on January 12, 2015
In Conferences, Paperlinks, R&D/Labnews
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Important SOI-based developments in MEMS, NEMS (like MEMS but N for nano), sensors and energy harvesting shared the spotlight with advanced CMOS and future devices at IEDM 2014 (15-17 December in San Francisco). IEDM is the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. Here in Part 3, we’ll […]

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IEEE SOI-3D-Substhreshold (S3S) Conference Issues Call for Papers

Posted on January 9, 2015
In Industry Buzz
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The IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S) has issued the 2015 Call for Papers. Now in its 3rd year as a combined event, the 2015 IEEE S3S Conference will take place in Sonoma Valley, CA, just north of San Francisco, October 5-8. This industry-wide event will gather together widely known experts, contributed papers and […]

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Strong uptick in FD-SOI patent activity, according to KnowMade report

Posted on January 9, 2015
In Industry Buzz
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There’s been a significant uptick in patents related to fully-depleted SOI, according to a new report by KnowMade (click here to get the report brochure).  The report looks at both FD-SOI and SOI-FinFETs (both of which are fully depleted technologies).  More than 740 patent families have been published to date, of which planar FD-SOI accounts for 340 families.  Following a […]

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SOI-based future device structures at IEDM ’14 (Part 2 of 3 in ASN’s IEDM coverage) Thumbnail

SOI-based future device structures at IEDM ’14 (Part 2 of 3 in ASN’s IEDM coverage)

Posted by on January 9, 2015
In Conferences, Paperlinks, R&D/Labnews
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Beyond FD-SOI and FinFETs, important SOI-based developments in advanced device architectures including nanowires (NW), gate all around (GAA) and other FET structures shared the spotlight at IEDM 2014 (15-17 December in San Francisco). IEDM is the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. Here in Part 2 of […]

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10nm FD-SOI, SOI FinFETs at IEDM ’14 (Part 1 of 3 in ASN’s IEDM coverage) Thumbnail

10nm FD-SOI, SOI FinFETs at IEDM ’14 (Part 1 of 3 in ASN’s IEDM coverage)

Posted by on December 31, 2014
In Conferences, Paperlinks, R&D/Labnews
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FD-SOI at 10nm (and other nodes) as well as SOI FinFETs shared the spotlight at IEDM 2014 (15-17 December in San Francisco), the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. There were about 40 SOI-based papers presented at IEDM. Here in Part 1 of ASN’s IEDM coverage, we […]

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SOI-3D-SubVt (S3S): three central technologies for tomorrow’s mainstream applications Thumbnail

SOI-3D-SubVt (S3S): three central technologies for tomorrow’s mainstream applications

Posted by and on November 3, 2014
In Conferences
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ST further accelerates its FD-SOI ROs* by 2ps/stage, and reduces SRAM’s VMIN by an extra 70mV. IBM shows an apple-to-apple comparison of 10nm FinFETs on Bulk and SOI. AIST improves the energy efficiency of its FPGA by more than 10X and Nikon shows 2 wafers can be bonded with an overlay accuracy better than 250nm. […]

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With FD-SOI, Industry Takes Another Look at SOI (SemiEngineering)

Posted on October 27, 2014
In Industry Buzz
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In a piece entitled Time To Look At SOI Again (you can read it here), SemiconductorEngineering Executive Editor Mark Lapedus charts the industry’s accelerating interest in SOI, including FD-SOI and FinFETs on SOI. He notes that FD-SOI is now planned for four generations: 28nm, 20nm, 14nm and 10nm. The offering has expanded beyond ST to […]

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FD-SOI Front and Center at Very Successful Semicon Europa Thumbnail

FD-SOI Front and Center at Very Successful Semicon Europa

Posted by on October 17, 2014
In Conferences, Editor's Blog
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Yes, GlobalFoundries is hot on FD-SOI. Yes, Qualcomm’s interested in it for IoT. Yes, ST’s got more amazing low-power FD-SOI results. These are just some of the highlights that came out of the Low Power Conference during Semicon Europa in Grenoble, France (7-9 October 2014). This was Semicon Europa’s first time in Grenoble, the heart […]

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Semicon Europa ’14 (Grenoble, 7-9 October) Includes Top Speakers at Conferences on Low Power, 3DI, Power Electronics & more Thumbnail

Semicon Europa ’14 (Grenoble, 7-9 October) Includes Top Speakers at Conferences on Low Power, 3DI, Power Electronics & more

Posted by on September 26, 2014
In Conferences, Editor's Blog
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  For the first time ever, Semicon Europa will be held in Grenoble this year, and FD-SOI will be a major part of it (website link here). With more than 5000 visitors and 350 exhibitors, Semicon Europa is the greatest annual event for the European microelectronics industry. And Grenoble can fairly be considered the epicenter of […]

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