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Archive of FDSOI

NXP, Qualcomm, Skyworks to Keynote IoT Theme in Upcoming IEEE SOI-3D-SubVt (S3S) Conference (San Francisco, Oct.’16) – Late News Submissions Open, Advance Program Available Thumbnail

NXP, Qualcomm, Skyworks to Keynote IoT Theme in Upcoming IEEE SOI-3D-SubVt (S3S) Conference (San Francisco, Oct.’16) – Late News Submissions Open, Advance Program Available

Posted by on August 15, 2016
In Conferences, In & Around Our Industry
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IEEE S3S Conference 10-13 October 2016 Hyatt Regency San Francisco Airport IEEE SOI–3D–Subthreshold Microelectronics Technology Unified Conference Theme: Energy Efficient Technology for the Internet of Things Late News submissions open and Advance Program available The IEEE S3S Conference brings together 3 key technologies that will play a major role in tomorrow’s industry: SOI, 3D integration, […]

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Call for submissions to FD-SOI IP Workshops (prizes!): Dresden (March), Bangalore (April), Shanghai (Sept), Grenoble (Dec)

Posted on February 3, 2016
In Industry Buzz
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  Design & Reuse, in partnership with GlobalFoundries, ST, Soitec and Leti, is sponsoring a series of FD-SOI IP Workshops around the globe. (Click here for more information.) These working days aim at sharing information about IP that’s currently available or is being designed for FD-SOI technology. The first conference will take place during DATE […]

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FD-SOI makes analog designers happy (NewElectronics)

Posted on November 30, 2015
In Industry Buzz
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A recent NewElectronics article entitled ST’s FD-SOI transistor is set to give analogue designers a new knob to tune parameters, explores the many reasons that FD-SOI makes designers happy – even the analog folks. Editor Graham Pitcher talked to analog designer Andreia Cathelin, a senior member of STMicroelectronics’ technical staff. Among plenty of other things, […]

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Soitec board names CEO Boudre Chairman; Auberton-Hervé Chairman Emeritus

Posted on September 24, 2015
In Industry Buzz
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Soitec, the world’s SOI wafer leader, announced that the Board of Directors has named André-Jacques Auberton-Hervé as Chairman Emeritus (he founded Soitec together with Jean-Michel Lamure in 1992). CEO Paul Boudre has been appointed Chairman of Soitec’s Board of Directors. (Read the press release here.)

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ST unveils first FD-SOI products – groundbreaking SOCs for set-top-boxes

Posted on September 10, 2015
In Industry Buzz
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FD-SOI champion STMicroelectronics has unveiled the company’s first System-on-Chip (SoC) products on FD-SOI. Two multi-core ARM SoC offerings – both for set-top boxes – have been announced. ST credits the 28nm FD-SOI silicon technology with providing highly-efficient RF and analog integration as well as outstanding power efficiency so that set-top box makers can now design […]

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SST article details Leti’s Monolithic 3D presentation at Semicon West ’14

Posted on September 1, 2014
In Industry Buzz
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An excellent article in SST details Leti’s monolithic 3D (M3D) technology, as presented at the SemiconWest 2014 Leti Day (read the full article here). Written by Brian Cronquest, MonolithIC 3D’s VP Technology & IP, the piece covers a presentation given by Olivier Faynot, Leti’s Device Department Director, about “monolithic 3D technology as the ‘solution for […]

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ST Says New Foundry Signed for 28nm FD-SOI

Posted on April 30, 2014
In Industry Buzz
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ST has signed a new foundry for 28nm FD-SOI manufacturing, but isn’t yet saying who it is. In a press release issued with the STMicroelectronics’ 2014 First Quarter Financial Results (read press release here), Jean-Marc Chery, Executive Vice President and General Manager, Embedded Processing Solutions, said, “We have just signed a strategic agreement with a […]

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Body Biasing in FD-SOI: A Designer’s Nightmare or a Longtime Friend? Thumbnail

Body Biasing in FD-SOI: A Designer’s Nightmare or a Longtime Friend?

Posted by on April 30, 2014
In Design & Manufacturing, News & Viewpoints
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By Ali Khakifirooz (Spansion) One of the unique features of the FD-SOI technology is the ability of using a wide range of body bias to modulate the transistor VT. Unlike bulk planar technology, where the maximum body bias is limited by p-n junction leakage and potential latch-up, in FD-SOI technology the full range of forward […]

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More Good FD-SOI News from DATE Conference – ST, Leti, Mentor, CMP Thumbnail

More Good FD-SOI News from DATE Conference – ST, Leti, Mentor, CMP

Posted by on May 22, 2013
In Editor's Blog
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At the recent DATE Conference in Grenoble (DATE is like DAC, but in Europe, alternating yearly between Grenoble and Dresden), STMicroelectronics, CEA-Leti & Mentor Graphics joined forces for a FD-SOI presentation organized by CMP and sponsored by Mentor. Here are some of the highlights (the complete presentations are all available from the CMP website). FD-SOI: […]

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ST’s FD-SOI Wins EETimes ACE Award… and Customers! Thumbnail

ST’s FD-SOI Wins EETimes ACE Award… and Customers!

Posted by on May 2, 2013
In Editor's Blog
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Two important FD-SOI wins for STMicroelectronics have just been announced: The EETimes ACE Award for Energy Technology; Customers. The Energy Technology Award was presented at a ceremony for the 2013 Annual Creativity in Electronics (ACE) Awards. It is given by EETimes and EDN, two of the most prominent trade-media sources in electronics. The ACE Awards […]

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