ASN

Archive of FD-SOI

Going Up! Monolithic 3D as an Alternative to CMOS Scaling Thumbnail

Going Up! Monolithic 3D as an Alternative to CMOS Scaling

Posted by , and on April 9, 2014
In Design & Manufacturing, R&D/Labnews
Tagged with , , , , , , , , , , , , , ,

By Jean-Eric Michallet, Hughes Metras and Perrine Batude (CEA-Leti)  The miniaturization of the MOSFET transistor has been the main booster for the semiconductor industry’s rapid growth in the last four decades. Following “Moore’s Law”, this scaling race has enabled performance increases in integrated circuits at a continuous cost reduction: today’s $200 mobile phone has as […]

Continue ReadingLeave a Comment

SemiWiki: FD-SOI’s the Technology to Continue Moore’s Law

Posted on March 26, 2014
In Industry Buzz
Tagged with , , , , , , , ,

A new SemiWiki post by Dr. Eric Esteve of IPnest entitled, The Technology to Continue Moore’s Law… (click here to read it) argues that FD-SOI is the right choice.  He explores cost and manufacturing considerations, and looks at the design issues in logic, memories and analog.  A highly recommended read.

Continue ReadingLeave a Comment
Presentation on Substrates for SOI-FinFETs and FD-SOI by SEH, World Wafer Leader, Posted on weSRCH Thumbnail

Presentation on Substrates for SOI-FinFETs and FD-SOI by SEH, World Wafer Leader, Posted on weSRCH

Posted on March 26, 2014
In Industry Buzz
Tagged with , , , , , , ,

(Courtesy: SEH, weSRCH)   A presentation by Shin‐Etsu Handotai (SEH, the world’s largest wafer supplier) detailing the company’s line-up of wafers for FD-SOI and SOI-FinFET is now available on weSRCH (click here to access it). SEH, a $12.7 billion company supplying over 20% of the world’s bulk silicon wafers, has been making SOI wafers since […]

Continue ReadingLeave a Comment
FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance Thumbnail

FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance

Posted by and on March 26, 2014
In Design & Manufacturing, News & Viewpoints
Tagged with , , , , , , , , , ,

By Bich-Yen Nguyen and Christophe Maleville (Soitec) We are in the era of mobile computing with smart handheld devices and remote data storage “in the cloud,” with devices that are almost always on and driven by needs of high data transmission rate, instant access/connection and long battery life.  With all the ambitious requirements for better […]

Continue ReadingLeave a Comment
Soitec Semicon Japan Presentation on Substrates for Mobile Era Now On weSRCH Thumbnail

Soitec Semicon Japan Presentation on Substrates for Mobile Era Now On weSRCH

Posted on March 19, 2014
In Industry Buzz
Tagged with , , , , , ,

  (Image courtesy: SEMI, Soitec, weSRCH) An excellent Soitec presentation from Semicon Japan entitled Innovative Substrates in the Mobile Era is now available on weSRCH (click here to view it). Given by Soitec COO Paul Boudre, it details the role of SOI wafers in RF and FD-SOI for mobile.

Continue ReadingLeave a Comment
Semicon Europa 2014 Comes to Grenoble, Issues Call for Papers Thumbnail

Semicon Europa 2014 Comes to Grenoble, Issues Call for Papers

Posted on March 19, 2014
In Industry Buzz
Tagged with , , , , , , , , ,

For the first time, SEMICON Europa will be held in Grenoble, France. The greater Grenoble region is home to industry leaders leveraging and researching SOI and related advanced substrates, including Soitec, Leti and  ST. SEMI has now announced the “Call for Papers” for technical sessions and presentations for SEMICON Europa 2014, which takes place October […]

Continue ReadingLeave a Comment
ST Article in EETimes Details How FD-SOI Supports Moore’s Law Thumbnail

ST Article in EETimes Details How FD-SOI Supports Moore’s Law

Posted on March 19, 2014
In Industry Buzz
Tagged with , , , , , , , , ,

  A powerful, detailed article in EETimes-Asia details how FD-SOI Supports Moore’s Law (click here to read it).  Written by Laurent Remont, ST’s VP and GM for Technology and Product Strategy, Embedded Processing Solutions, it explores FD-SOI’s advantages in terms of price, power and performance versus planar bulk CMOS and FinFETs and 28nm and 14nm. Remont […]

Continue ReadingLeave a Comment
Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets Thumbnail

Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets

Posted by on March 19, 2014
In Design & Manufacturing, News & Viewpoints
Tagged with , , , , , , , , , , ,

By Handel Jones IBS has recently issued a new white paper entitled Why Migration to 20nm Bulk CMOS and 16/14nm FinFETs Is Not the Best Approach for the Semiconductor Industry.  The focus of the analysis is on technology options that can be used to give lower cost per gate and lower cost per transistor within […]

Continue ReadingLeave a Comment

Soitec article in GSA Forum explores FD-SOI, industry roadmaps

Posted on February 28, 2014
In Industry Buzz
Tagged with , , , , , ,

Soitec Sr. VP (and FD-SOI wafer guru) Christophe Maleville has written a very good, high-level piece in the Global Semiconductor Alliance (GSA) Forum.  Entitled Technology Selection Implications Intensify and Options are Limited, the piece examines cost-per-gate trends and explores roadmap options. He shows how FD-SOI provides a path forward with continued scalability, significant cost advantage […]

Continue ReadingLeave a Comment

Excellent Semiwiki piece examines ST’s ADC breakthrough (FD-SOI, ISSCC)

Posted on February 28, 2014
In Industry Buzz
Tagged with , , , , , ,

Semiwiki blogger Paul McLellan has written an excellent piece on the FD-SOI analog-to-digital converter (ADC) that ST presented recently at ISSCC. (Read the article here.)  He notes, “This is a very high performance ADC and thus an example of complex high-precision analog design in FD-SOI.”  He concludes, “Together with the low-power capability of the 28nm […]

Continue ReadingLeave a Comment