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SOI-3D-SubVt (S3S): three central technologies for tomorrow’s mainstream applications Thumbnail

SOI-3D-SubVt (S3S): three central technologies for tomorrow’s mainstream applications

Posted by and on November 3, 2014
In Conferences
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ST further accelerates its FD-SOI ROs* by 2ps/stage, and reduces SRAM’s VMIN by an extra 70mV. IBM shows an apple-to-apple comparison of 10nm FinFETs on Bulk and SOI. AIST improves the energy efficiency of its FPGA by more than 10X and Nikon shows 2 wafers can be bonded with an overlay accuracy better than 250nm. […]

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FD-SOI Front and Center at Very Successful Semicon Europa Thumbnail

FD-SOI Front and Center at Very Successful Semicon Europa

Posted by on October 17, 2014
In Conferences, Editor's Blog
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Yes, GlobalFoundries is hot on FD-SOI. Yes, Qualcomm’s interested in it for IoT. Yes, ST’s got more amazing low-power FD-SOI results. These are just some of the highlights that came out of the Low Power Conference during Semicon Europa in Grenoble, France (7-9 October 2014). This was Semicon Europa’s first time in Grenoble, the heart […]

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Welcome to IEEE S3S – the World’s Leading Conference for SOI, 3DI and Sub Vt (SF, 6-9 Oct) Thumbnail

Welcome to IEEE S3S – the World’s Leading Conference for SOI, 3DI and Sub Vt (SF, 6-9 Oct)

Posted by on September 17, 2014
In Conferences, R&D/Labnews
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(For best rates, register by September 18th.) The 2014 IEEE SOI-3DI–Subthreshold (S3S) Microelectronics Technology Unified Conference will take place from Monday October 6 through Thursday October 8 in San Francisco. Last year we entered into a new era as the IEEE S3S Conference. The transition from the IEEE International SOI Conference to the IEEE S3S […]

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2014 IEEE S3S (SOI/3D/SubVt) – Oct. SF – top speakers lined up; paper submissions til 26 May Thumbnail

2014 IEEE S3S (SOI/3D/SubVt) – Oct. SF – top speakers lined up; paper submissions til 26 May

Posted by on May 22, 2014
In Conferences
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IEEE International SOI-3D-Subthreshold Microelectronics Technology Unified Conference 6-9 October 2014 Westin San Francisco Airport, Millbrae, CA The IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S) is welcoming papers until May 26, 2014 (click here for submission guidelines).   Last year, the first edition of the IEEE S3S conference, founded upon the co-location of the IEEE […]

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FD-SOI Tops 100K SemiWiki Hits

Posted on April 30, 2014
In Industry Buzz
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100K views and counting: FD-SOI-related posts on SemiWiki are fabulously popular. Following a wrap-up by Paul McLellen of his FD-SOI talk at EDPS (read post here), heated discussion ensued in the comments section.  To show just how hot a topic FD-SOI is in the design community, SemiWiki co-founder Dan Nenni shared the following stats: 100,000 […]

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IEEE SOI-3D-Subthreshold Conference (SF, Oct. ’14) Call for Papers

Posted on April 9, 2014
In Industry Buzz
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After a very successful first edition in 2013, the 2014 IEEE S3S will take place in San Francisco, 6-9 October, 2014 (click here for details). IEEE S3S combines the former IEEE International SOI Conference and the IEEE Subthreshold Microelectronics Conference, and adds a parallel track in 3D Integration. The technical sessions will be preceded by […]

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Semicon Europa 2014 Comes to Grenoble, Issues Call for Papers Thumbnail

Semicon Europa 2014 Comes to Grenoble, Issues Call for Papers

Posted on March 19, 2014
In Industry Buzz
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For the first time, SEMICON Europa will be held in Grenoble, France. The greater Grenoble region is home to industry leaders leveraging and researching SOI and related advanced substrates, including Soitec, Leti and  ST. SEMI has now announced the “Call for Papers” for technical sessions and presentations for SEMICON Europa 2014, which takes place October […]

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Excellent ARM TechCon Video on FD-SOI Design by ST Posted on Synopsys Site Thumbnail

Excellent ARM TechCon Video on FD-SOI Design by ST Posted on Synopsys Site

Posted on February 20, 2014
In Industry Buzz
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(Courtesy: Synopsys, STMicroelectronics, ARM) An excellent ARM TechCon 2013 video on FD-SOI for designers is now posted on the Synopsys site. David Jacquet from ST shares the company’s FD-SOI approach to delivering optimized energy efficient solutions for the SoC market. Jacquet currently leads ST’s architecture activities for energy efficient high performance CPU/GPU implementations. In his […]

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FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range Thumbnail

FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range

Posted by on February 20, 2014
In Conferences, Design & Manufacturing, Editor's Blog, R&D/Labnews
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Body-biasing design techniques, uniquely available in FD-SOI, have allowed STMicroelectronics and CEA-Leti to demonstrate a DSP that runs 10x faster than anything the industry’s seen before at ultra-low voltages (read press release here). In the mobile world (not to mention the IoT), the role of DSPs is becoming ever more important. All those things you […]

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IEDM ’13 (Part 2): More SOI and Advanced Substrate Papers Thumbnail

IEDM ’13 (Part 2): More SOI and Advanced Substrate Papers

Posted by on December 19, 2013
In Conferences, Editor's Blog, Paperlinks
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SOI and other advanced substrates were the basis for dozens of excellent papers at IEDM ’13.  Last week we covered the FD-SOI papers (click here if you missed that piece). In this post, we’ll cover the other major SOI et al papers – including those on FinFETs, RF and various advanced devices. Brief summaries, culled […]

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