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FD-SOI: The Best Enabler for Mobile Growth and Innovation Thumbnail

FD-SOI: The Best Enabler for Mobile Growth and Innovation

Posted by on August 8, 2014
In Design & Manufacturing, News & Viewpoints, SOI In Action
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The following in-depth analysis, an IBS study entitled How FD-SOI will Enable Innovation and Growth in Mobile Platform Sales, concludes that the benefits of FD-SOI are overwhelming for mobile platforms through Q4/2017 based on a number of key metrics. In fact, FD-SOI has the ability to support three technology nodes, which can mean a useful […]

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The SOI Papers at VLSI ’14 (Part 2): Thumbnail

The SOI Papers at VLSI ’14 (Part 2):

Posted by on July 17, 2014
In Conferences, Editor's Blog, Paperlinks, R&D/Labnews
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Last week we posted Part 1 of our round-up of SOI papers at the VLSI Symposia – which included the paper showing that 14nm FD-SOI should match the performance of 14nm bulk FinFETs. (If you missed Part 1, covering the three big 14nm FD-SOI and 10nm FinFET papers, click here to read it now.) This […]

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The SOI Papers at VLSI ’14 (Part 1): Breakthroughs in 14nm FD-SOI, 10nm SOI-FinFETs Thumbnail

The SOI Papers at VLSI ’14 (Part 1): Breakthroughs in 14nm FD-SOI, 10nm SOI-FinFETs

Posted by on July 11, 2014
In Conferences, Editor's Blog, Paperlinks, R&D/Labnews
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The VLSI Symposia – one on technology and one on circuits – are among the most influential in the semiconductor industry. Three hugely important papers were presented – one on 14nm FD-SOI and two on 10nm SOI FinFETs – at the most recent symposia in Honolulu (9-13 June 2014). In fact, three out of four […]

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Is FD-SOI Cheaper? Why yes!

Posted by on June 27, 2014
In Design & Manufacturing, Editor's Blog, News & Viewpoints
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A debate is raging over at SemiWiki following a post there entitled “Is SOI Really Less Expensive?” by Scotten Jones (you can read it here). Within just over 48 hours, about 30 comments were made, with heavy hitters on both sides of the fence weighing in. While the post itself is about manufacturing economics, the […]

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14nm FD-SOI Presentation by ST Posted on WeSRCH Thumbnail

14nm FD-SOI Presentation by ST Posted on WeSRCH

Posted on June 17, 2014
In Industry Buzz
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A ppt presentation by STMicroelectronics entitled Features and Benefits of 14nm UTBB* FD-SOI Technology is now posted on WeSRCH (click here to view it). It is fairly technical, covering process boosters, modules and innovations, mask sequences, performance and scalability.

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Samsung & ST 28nm FD-SOI Is Major Opportunity, Says IBS (EETimes)

Posted on May 28, 2014
In Industry Buzz
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In an EETimes blog, Handel Jones of IBS says that the Samsung-ST FD-SOI announcement represents a major opportunity. (Read full blog here.) “Samsung Electronics has a major opportunity with its large wafer capacity to support low-leakage products with its 28 nm FD-SOI process,” he wrote. “Cadence Design Systems, Synopsys, and Mentor Graphics are all supporting […]

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Samsung Foundry Marketing Director Writes About Extending 28nm With FD-SOI Thumbnail

Samsung Foundry Marketing Director Writes About Extending 28nm With FD-SOI

Posted on May 28, 2014
In Design & Manufacturing, Editor's Blog, News & Viewpoints
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Samsung’s Senior Director Foundry Marketing Kelvin Low blogged enthusiastically about the recent Samsung-STMicroelectronics FD-SOI announcement  on the company’s website. He has graciously agreed to let ASN repost it here – and says we’ll be hearing more from him in the future.   Without further ado, here’s what he said:   While 14nm FinFET is the darling […]

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2014 IEEE S3S (SOI/3D/SubVt) – Oct. SF – top speakers lined up; paper submissions til 26 May Thumbnail

2014 IEEE S3S (SOI/3D/SubVt) – Oct. SF – top speakers lined up; paper submissions til 26 May

Posted by on May 22, 2014
In Conferences
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IEEE International SOI-3D-Subthreshold Microelectronics Technology Unified Conference 6-9 October 2014 Westin San Francisco Airport, Millbrae, CA The IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S) is welcoming papers until May 26, 2014 (click here for submission guidelines).   Last year, the first edition of the IEEE S3S conference, founded upon the co-location of the IEEE […]

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Interview: Christophe Maleville (Soitec) on Wafers in the FD-SOI Supply Chain Thumbnail

Interview: Christophe Maleville (Soitec) on Wafers in the FD-SOI Supply Chain

Posted by on May 19, 2014
In Design & Manufacturing, News & Viewpoints
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Interview with : Christophe Maleville (Soitec) on Wafers in the FD-SOI Supply Chain With FD-SOI entering the mainstream, fabless designers have been asking about the wafer supply chain. ASN spoke about it with Christophe Maleville, Sr. VP of the Microelectronics business unit at Soitec, the world’s leading SOI wafer producer. Christophe Maleville has been Senior Vice […]

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Huge Discussion Follows Handel Jones / IBS article in EETimes on FD-SOI vs. FinFETs

Posted on April 30, 2014
In Industry Buzz
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To date, over 40 readers have commented on Handel Jones’ (IBS) EETimes post entitled FinFETs Not the Best Silicon Road (read post here).  He noted that, “…next-generation 20nm bulk high-K metal gate CMOS and 16/14nm FinFET process will deliver smaller transistors. However, they will also have a higher cost per gate than today’s 28nm bulk […]

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