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Archive of 14nm

Going Up! Monolithic 3D as an Alternative to CMOS Scaling Thumbnail

Going Up! Monolithic 3D as an Alternative to CMOS Scaling

Posted by , and on April 9, 2014
In Design & Manufacturing, R&D/Labnews
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By Jean-Eric Michallet, Hughes Metras and Perrine Batude (CEA-Leti)  The miniaturization of the MOSFET transistor has been the main booster for the semiconductor industry’s rapid growth in the last four decades. Following “Moore’s Law”, this scaling race has enabled performance increases in integrated circuits at a continuous cost reduction: today’s $200 mobile phone has as […]

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SemiWiki: FD-SOI’s the Technology to Continue Moore’s Law

Posted on March 26, 2014
In Industry Buzz
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A new SemiWiki post by Dr. Eric Esteve of IPnest entitled, The Technology to Continue Moore’s Law… (click here to read it) argues that FD-SOI is the right choice.  He explores cost and manufacturing considerations, and looks at the design issues in logic, memories and analog.  A highly recommended read.

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FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance Thumbnail

FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance

Posted by and on March 26, 2014
In Design & Manufacturing, News & Viewpoints
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By Bich-Yen Nguyen and Christophe Maleville (Soitec) We are in the era of mobile computing with smart handheld devices and remote data storage “in the cloud,” with devices that are almost always on and driven by needs of high data transmission rate, instant access/connection and long battery life.  With all the ambitious requirements for better […]

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ST Article in EETimes Details How FD-SOI Supports Moore’s Law Thumbnail

ST Article in EETimes Details How FD-SOI Supports Moore’s Law

Posted on March 19, 2014
In Industry Buzz
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  A powerful, detailed article in EETimes-Asia details how FD-SOI Supports Moore’s Law (click here to read it).  Written by Laurent Remont, ST’s VP and GM for Technology and Product Strategy, Embedded Processing Solutions, it explores FD-SOI’s advantages in terms of price, power and performance versus planar bulk CMOS and FinFETs and 28nm and 14nm. Remont […]

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Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets Thumbnail

Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets

Posted by on March 19, 2014
In Design & Manufacturing, News & Viewpoints
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By Handel Jones IBS has recently issued a new white paper entitled Why Migration to 20nm Bulk CMOS and 16/14nm FinFETs Is Not the Best Approach for the Semiconductor Industry.  The focus of the analysis is on technology options that can be used to give lower cost per gate and lower cost per transistor within […]

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SemiWiki heralds Fujitsu benchmarks on high-performance 14nm FD-SOI chip

Posted on February 18, 2014
In Industry Buzz
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A new SemiWiki piece by Eric Esteve heralds Fujitsu’s 14nm FD-SOI benchmark results for a high-performance networking chip (click here to read the post). In “If you still think that FDSOI is for low performance IC only…”, Esteve explains why power is critical in these high-end ASICs. He then leads readers through the benchmark results […]

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IP for FD-SOI: Examples from ST Thumbnail

IP for FD-SOI: Examples from ST

Posted by on February 14, 2014
In Design & Manufacturing, Editor's Blog
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Interested in energy-efficient SOCs? At the IP-SOC Conference last fall, STMicroelectronics’ Giorgio Cesana presented examples of the technological competitiveness of FD-SOI IP for memories, cores, ultra-low voltage and analog. Here’s a brief recap. The complete presentation, entitled “FD-SOI Technology for Energy-Efficient SoCs: IP Development Examples” is available on the Design & Reuse website (click here […]

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CMP delivers multi-project wafer runs of 28nm FD-SOI with impressive device performance Thumbnail

CMP delivers multi-project wafer runs of 28nm FD-SOI with impressive device performance

Posted on January 31, 2014
In Industry Buzz
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CMP recently delivered the first 28nm FD-SOI/10LM multi-project wafer run, Kholdoun Torki, Technical Director at CMP has indicated. “We received positive feedback on the test results with quite impressive device performance,” he said. The PDK is from ST, making this a success for both STMicroelectronics and CMP. 
In 2013, they had 32 prototypes from 15 customers over […]

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GloFo could hit one out of the park with FD-SOI, says PC Perspectives

Posted on January 17, 2014
In Industry Buzz
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“If GLOBALFOUNDRIES has the ability to economically research, develop, and produce parts on 20 nm FD-SOI, they could be hitting one out of the park,” said Josh Walrath (citing the baseball expression for a big home run) in a long PC Perspectives article last fall (Oct. ’13). “The industry is clamoring for a product that […]

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SOI: Looking Back Over a Year of Moving Forward (Part 2, RF-SOI & SOI-FinFETs) Thumbnail

SOI: Looking Back Over a Year of Moving Forward (Part 2, RF-SOI & SOI-FinFETs)

Posted by on January 17, 2014
In Editor's Blog, News & Viewpoints
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As we noted in the previous post (click here if you missed it), 2014 should be a terrific year for the greater SOI community. But before we look forward (which we’ll do in an upcoming post), let’s continue considering where we’ve been and some of the highlights of the last year.  In fact, there was […]

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