A new Semico Research study estimates the impact of SOI on the bottom line. As semiconductor process technologies move down the nanometer scale from 90nm to 65nm and smaller, the benefits of silicon-oninsulator (SOI) wafers in reducing junction capacitance, improving the short-channel effect, reducing leakage and decreasing soft error rates become more and more attractive. …

The widening availability of tools and services is good news for designers in the fabless/foundry arena considering the move to SOI. Leading foundries have made the investments in manufacturing on SOI. Those that have taken the final steps – finalizing electrical characterization, constructing SPICE models, integrating design tools and building libraries – are winning business. …

Michael Gruver, Program Manager, IBM Engineering & Technology Solutions, gives his perspective on foundry customers and custom SOI design. Advanced Substrate News: What tools or investments would a customer need if they were going for an SOI-based solution? Michael Gruver: There are two primary areas that a customer should address if they intend to use …

Fabless Via leverages IBM’s 90nm SOI process. A leader in the fabless world, Via Technologies has launched its new, fanless 90-nm SOI Via-Eden™ and Eden™ ULV (Ultra Low Voltage) processors, specifically targeted at business, industrial and commercial applications such as thin clients, silent desktops, IPCs and set top boxes where ultra cool, ultra quiet, reliable …

Philips is building more and more high voltage/power products on SOI. Here’s why. Since the 1990’s, Philips has been and continues to be a pioneer in SOI-based high-power and high-voltage ICs (handling anywhere from 12 to 800 volts). Now these chips are everywhere. They’re in smaller, lighter power modules and battery-chargers for a whole host …

Monitoring defects using low thresholds is key to manufacturing yield. For inspecting SOI wafers, UV light overcomes the limitations of visible light. Here’s why.   With visible-light inspection tools, the scattering behavior of defects on SOI structures depends on silicon and oxide thicknesses. Because of buried interfaces, transmitted visible light is sent back to the …

During an Elysée ceremony, the French president cited the company’s international growth and employment creation. At a ceremony held at the presidential Elysée Palace in March, French President Jacques Chirac awarded Soitec the “2006 Boldness and Creativity Award” (Prix de l’Audace Créatrice). The prize, awarded yearly, recognizes the achievements of a listed company that is …

Top honors go to advanced substrate pioneers – again. For the second year in a row, the IEEE Electron Devices Society (EDS) gave the J.J. Ebers Award for “…outstanding technical contributions to electron devices” to an SOI pioneer. The 2005 honor went to Bijan Davari of IBM, now Vice President of Next Generation Computing Systems/Technology. …

Company received top White House medal and SI Fab of the Year. Recently, IBM has been lining up awards for technology leadership, often citing the company’s work in SOI. IBM’s 300-mm, SOI-enabled Building 323 in East Fishkill, NY, was selected as the Semiconductor International 2005 Top Fab Award winner. According to the publication, “IBM has …

For each technology node, those in the substrate world have to be ready with options years in advance of their customers. ASM describes developments in germanium epitaxy that could enable the industry to choose a GeOI future. In the silicon device industry, new materials have to be introduced to assure IC performance improvement from one …