The latest white paper from SOI Consortium members is loaded with technical information. The full paper is available on the website. Here are some of the highlights. In approaching a bulk-to-FD-SOI port, different perspectives can be taken: IP Porting: The focus may be to easily port the libraries and other IP available in Bulk to …

With performance, efficiency, and power optimization as top priorities, AMD’s innovative Bulldozer architecture is built on 32nm SOI. As of the Fall of 2011, AMD is shipping both client and server CPUs based on the new Bulldozer architecture. The first of the new APUs (CPU + GPU) incorporating Bulldozer modules will start shipping in 2012. …

Members of the SOI Consortium have released a major white paper addressing the porting of SOC designs from bulk to FD-SOI. SOC designers face a critical juncture at 20/22nm. Choices must be made whether to stay on bulk CMOS, change to a FinFET architecture, or move to planar, fully-depleted (FD) SOI-based CMOS. Power management and …

STMicroelectronics sees its flavor of planar FD-SOI as an excellent response to the complex needs of mobile multimedia chips. The multi-functional system-on-chips (SOC) needed at the heart of the next generations of wireless, high-performance, low-power multimedia devices have very different needs than the mono-functional processors of the past. Traditionally, the trade-off for computers and servers …

The IEEE is once again giving two of its most prestigious awards to some of the SOI and advanced substrate industry’s leading figures. There are few greater honors in engineering than the IEEE  Technical Field Awards (TFAs). And once again, people who work in advanced substrates are among the recipients of two major awards: the …

Bulk logic designs can be ported directly to FD-SOI for high-performing, low-power mobile apps. Fully-depleted (FD)-SOI is a potential alternative to BULK 20nm. But what sort of the impact will that have on the design flow? The short answer is: very little. Designs for low-power mobile applications in 28nm bulk benefit significantly in terms of …

EVG’s new wafer bonding system is a fully automated tool for production-level fabrication of 450mm SOI wafers. Transitioning to larger wafers heightens the need for process uniformity.  Wafer bonding is no exception, as process parameters must be applied with a high degree of both precision and uniformity.  This requirement will become particularly critical within the …

A new study compares processes for the 20/22nm generation at a typical foundry. Silicon On Insulator (SOI) has been in use for state-of-the-art integrated circuit (IC) manufacturing since IBM first championed the technology in the mid-nineties. SOI offers process technologists the option of reducing power or improving performance for a given process node. As process …

Highlights from the IEEE 2011 SOI Conference include presentations by ST, ARM, IBM, Intel, Leti, Peregrine, GlobalFoundries and more. The 2011 IEEE SOI Conference, held in Tempe, AZ this past October was not one to miss. Highlights include excellent and insightful papers from ST, ARM, IBM, Intel, Leti, Peregrine and GlobalFoundries, plus many more that …

Guenter Reiniger, Marketing Manager for NXP’s Automotive Sensors, explains how SOI helps eliminate the need for external components in a new magnetic sensor family. Advanced Substrate News (ASN): NXP recently announced the KMA210, the first in a new family of magnetoresistive (MR) sensor chips. What is it used for? Guenter Reiniger (GR): The KMA210 is …