SOI is a central pillar of NXP’s energy-efficient lighting strategy. In this exclusive ASN interview, Jacques Le Berre, the company’s director of marketing and business development for Lighting Solutions, explains why. Advanced Substrate News (ASN): Looking at overall trends and the “big picture” in the lighting market, what do consumers want / what are governments …

SOI is poised to take center stage in the impending lighting revolution, with companies like NXP leading the charge. Here’s why. Incandescent bulbs are being phased out or banned worldwide: European bans started taking effect in 2009; the US, Canada, Japan and Russia will start in 2012. India, Brazil, China and many more have all …

VLSI projects that a critical mass of expertise will support a fast transition to SOI designs at 32nm. The semiconductor market recovery has helped to grow SOI demand in-line with the industry. Established applications such as AMD’s microprocessors, IBM’s high performance ASICs, and other manufacturers’ high performance computer, consumer  and communications products are moving through …

First announced a decade ago, NXP’s EZ-HV™ is process technology for the production of commercial high-voltage (HV) SOI-enabled ICs.  It is at the heart of NXP’s GreenChip technology, and is ideal for implementing optimal solutions for a wide range of lighting applications. In high-power systems, it allows sophisticated control logic and high voltage drive circuits …

Newest Drivers Reach New Levels of Integration NXP’s UBA2211 for the 230V and 110V markets is the latest driver IC family in the company’s CFL IC portfolio. Built on NXP’s EZ-HV SOI technology, it features the highest level of integration available on the market today, including a current controlled preheat function, enabling more compact designs, …

A technological tour-de-force, Soitec’s wafers for FD SOI meet all the requirements At the 20 nm node, short channel effects and random dopant fluctuations (RDF) are the major hurdles facing the CMOS industry. An extremely attractive solution is the planar, ultra-thin body Fully-Depleted (FD) SOI transistor. These devices are built on an ultra-thin SOI substrate, …

ARM’s verified the SOI SPICE models accuracy in its physical IP, helping designers to simulate their chips prior to tape-out as well as helping the foundries to tune their SOI SPICE models. SPICE models are used for checking the integrity of circuit designs and predicting circuit behavior prior to commiting a design to silicon. Each …

GaN-on-Si is moving towards becoming a cost-effective enabler for next-generation LED and power devices. During the past decade gallium nitride (GaN) has become an important compound semiconductor as it enables numerous key applications in optoelectronics and in power electronics. GaN LED technology could well be the Holy Grail in terms of providing the next generation …

Researchers in academia have partnered with industry to increase understanding of critical issues in advanced non-classical CMOS devices. Highly scaled devices present a new range of challenges with respect to critical issues such as leakage current, short-channel effects, high-field effects, variability, reliability, noise and parasitic impact. Device structure and material innovation are the primary enablers …

The third installment in the SOI Consortium’s ongoing FD SOI Workshop series, the Tokyo event was a major success. The University of Tokyo recently hosted a hugely successful one-day workshop on the FD SOI ecosystem’s readiness. The event took place on Saturday, the 25th of September 2010, at the University of Tokyo’s Komaba Research Campus, …