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Archive of Industry Buzz

RF-SOI Innovator JP Raskin (his team’s work is in your smartphone) Awarded Blondel Medal Thumbnail

RF-SOI Innovator JP Raskin (his team’s work is in your smartphone) Awarded Blondel Medal

Posted on February 8, 2016
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RF-SOI substrate guru Jean-Pierre Raskin, whose team at UCL* has driven the technology behind the most advanced wafer substrates for RF applications, has been awarded one of the highest honors in electronics: the prestigious Blondel Medal. The technology he pioneered is now in virtually all the world’s smartphones, and used by just about every RF […]

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Call for submissions to FD-SOI IP Workshops (prizes!): Dresden (March), Bangalore (April), Shanghai (Sept), Grenoble (Dec)

Posted on February 3, 2016
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  Design & Reuse, in partnership with GlobalFoundries, ST, Soitec and Leti, is sponsoring a series of FD-SOI IP Workshops around the globe. (Click here for more information.) These working days aim at sharing information about IP that’s currently available or is being designed for FD-SOI technology. The first conference will take place during DATE […]

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Mentor tools being qualified for GlobalFoundries’ 22nm FD-SOI process

Posted on December 23, 2015
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Mentor Graphics is collaborating with GlobalFoundries on 22nm FD-SOI to qualify the Mentor® RTL to GDS platform for the current version of GlobalFoundries 22FDX™ platform reference flow. (Read the press release here.) This includes including Mentor’s RealTime Designer™ physical RTL synthesis solution and Olympus-SoC™ place & route system. In addition, Mentor and GF are working […]

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RF-SOI Pioneer Peregrine Introduces New RF Digital Phase Shifter Thumbnail

RF-SOI Pioneer Peregrine Introduces New RF Digital Phase Shifter

Posted on December 22, 2015
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RF-SOI pioneer Peregrine Semiconductor has introduced the UltraCMOS® PE44820, an 8-bit digital phase shifter designed for active antenna apps, covering a 358.6-degree phase range. (Read the press release here.) The UltraCMOS® PE44820 is a monolithic, digitally controlled product made for easy design-in and delivering exceptional phase accuracy and high linearity. Supporting a frequency range of […]

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VLSI Research names Soitec CEO to 2015 All Stars of the Semiconductor Industry Thumbnail

VLSI Research names Soitec CEO to 2015 All Stars of the Semiconductor Industry

Posted on December 19, 2015
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VLSI Research Chip Insider has named Soitec CEO Paul Boudre to its roster of 2015 All Stars of the Semiconductor Industry. (See the announcement here.) Boudre was cited for “…successfully re-organizing Soitec back to its core business as a leading innovative engineered substrate supplier. His first year results are already astounding, with very high growth […]

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IEEE S3S, Top SOI/3D/SubVt Conference, Issues Call for Papers. Theme: Energy Efficient Tech for IoT. (Best Student Paper wins $1000) Thumbnail

IEEE S3S, Top SOI/3D/SubVt Conference, Issues Call for Papers. Theme: Energy Efficient Tech for IoT. (Best Student Paper wins $1000)

Posted on December 17, 2015
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The IEEE S3S (SOI/3D/SubVt) has issued its call for papers for the 2016 conference (click here for details). The theme of the conference, which will take place October 10th – 13th in San Francisco, is “Energy Efficient Technology for the Internet of Things”. This industry-wide event gathers together widely known experts, contributed papers and invited […]

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TowerJazz Cites Strong RF-SOI Growth as Driving force in TX Fab Acquisition Thumbnail

TowerJazz Cites Strong RF-SOI Growth as Driving force in TX Fab Acquisition

Posted on December 8, 2015
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With the acquisition of Maxim’s 8-inch fab in San Antonio, Texas, TowerJazz plans to quickly qualify its core specialty technologies, including its advanced Radio-Frequency Silicon-on-Insulator (RF-SOI) offering, to serve the substantial growth in demand from its customers. (See press release here.) The proposed purchase will expand TowerJazz’s current worldwide manufacturing capacity, cost-effectively increasing production by […]

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Leti Develops 22nm FD-SOI Local-strain Techniques to boost performance and lower power consumption

Posted on December 8, 2015
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CEA-Leti announced it has developed two techniques to induce local strain in FD-SOI processes for next-generation FD-SOI circuits that will produce more speed or lower power consumption and improved performance. (For more details, read the press release here.) Targeting the 22/20nm node, the local-strain solutions are dual-strained technologies: compressive SiGe for PFETs and tensile Si […]

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Toshiba announces new RF-SOI process and smartphone switch with industry-best insertion loss

Posted on November 30, 2015
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Toshiba has announced TaRF8, the next generation in the company’s TarfSOI™ (aka Toshiba advanced RF SOI) process, which is optimized for RF switch apps. The first product to use the technology is Toshiba’s new SP12T, enabling the lowest-class of insertion loss in the industry. Lowering insertion loss is recognized as particularly important in decreasing RF […]

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FD-SOI makes analog designers happy (NewElectronics)

Posted on November 30, 2015
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A recent NewElectronics article entitled ST’s FD-SOI transistor is set to give analogue designers a new knob to tune parameters, explores the many reasons that FD-SOI makes designers happy – even the analog folks. Editor Graham Pitcher talked to analog designer Andreia Cathelin, a senior member of STMicroelectronics’ technical staff. Among plenty of other things, […]

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