ASN

Archive of In & Around Our Industry

Chartered’s Fab 7 Wins SI “Top Fab” Award Thumbnail

Chartered’s Fab 7 Wins SI “Top Fab” Award

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, People
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The world’s first pure-play foundry to offer SOI has received “Semiconductor International” magazine’s top honor. Semiconductor International (SI) magazine has honored Chartered Semiconductor Manufacturing’s Fab 7 with the “Top Fab” award for 2006. With Fab 7, Chartered became the first pure-play foundry to expand into SOI when it began producing SOI-based chips in high-volume for […]

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Innovative Silicon Wins ACE, IEEE Spectrum, F&S Awards… and More Thumbnail

Innovative Silicon Wins ACE, IEEE Spectrum, F&S Awards… and More

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, People
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ISi and its Z-RAM® memory technology are gaining accolades across the industry. Innovative Silicon (ISi), the developer of Z-RAM® ultra-dense memory intellectual property (IP), is on an awards roll. The company recently announced that IEEE Spectrum Magazine readers named Z-RAM the number one winning technology in its “Winners and Losers” edition. Over 50 percent of […]

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George Celler Co-Chairs SiWEDS Industrial Board Thumbnail

George Celler Co-Chairs SiWEDS Industrial Board

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, People
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Industry-academia partnership focuses on the wafer. Soitec USA Chief Scientist Dr. George K. Celler has been named co-chairman of the SiWEDS Industrial Advisory Board (IAB). SiWEDS, which stands for Silicon Wafer Engineering and Defect Science, is a global silicon partnership for research, development and education, co-sponsored by the U.S. National Science Foundation (NSF).

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New Technology Captures Defects of Interest at 45nm Thumbnail

New Technology Captures Defects of Interest at 45nm

Posted by (KLA Tencor) on May 11, 2007
In ASN #7, Design & Manufacturing, In & Around Our Industry
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New in-line inspection equipment from KT reaches new heights in accuracy for sorting out cleanable particles from killer defects. At the 45nm node, the very nature of the defects and the particularities of the substrate impact light scattering detection methodologies. KLA-Tencor’s new Surfscan SP2XP system not only captures more shallow defects like stains or residues, […]

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SPOTlight on Smart Power Thumbnail

SPOTlight on Smart Power

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, R&D/Labnews
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SOI-based Smart Power Innovator Atmel leads new Medea+ program. Atmel, a leading proponent of SOI for Smart Power, is heading up a new Medea+ program called SPOT-2 (program #2T205), for Deep Sub-micron Smart-Power Technologies. The 3-year program aims to develop a new generation of Smart Power Technologies for automotive and consumer applications. More than a […]

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Industry SOI Innovators in Core Group Guiding Massive European Nanoelectronics Initiative

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, R&D/Labnews
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Eight key industrial players in nanoelectronics have created the legal entity for partnering with the EC’s €3 billion Joint Technology Initiative. With the legalities now in place, the greater nanoelectronics community is set to play a significant role in defining the future of nanoelectronics R&D in Europe.

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New Layer Transfer Technology Moves Processed Circuits to the Best Substrates for the Application Thumbnail

New Layer Transfer Technology Moves Processed Circuits to the Best Substrates for the Application

Posted by (Soitec) on May 11, 2007
In ASN #7, Design & Manufacturing, In & Around Our Industry
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Transferring a layer with all the circuits from a processed wafer onto another support substrate decouples the exigencies of circuit fabrication from the needs of the final application. The best substrate for circuit fabrication is not always the best choice for the functioning of the chip. Nor is the best substrate for the final application […]

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Thin BOX: A Solution for High-Speed, Low-Power SoCs Thumbnail

Thin BOX: A Solution for High-Speed, Low-Power SoCs

Posted by (Hitachi) on December 6, 2006
In ASN #6, Design & Manufacturing, In & Around Our Industry
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Control of Si substrate bias in “Silicon on Thin BOX” suppresses leakage current at 45nm and beyond. Leakage currents in MOSFETs, originating in scattering from device features, pose a serious challenge in high-performance, low-power SoCs (system-on-a-chip), which are applicable to mobile products. The situation becomes more critical at the 45nm technology node.

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Floating Body RAM Becomes an Industrial Reality Thumbnail

Floating Body RAM Becomes an Industrial Reality

Posted by (Toshiba Corporation) on December 6, 2006
In ASN #6, Design & Manufacturing, In & Around Our Industry
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Toshiba has successfully developed a high-performance, high-density, low-cost 128Mb FBRAM. FBRAM is Random Access Memory (RAM) with a Floating Body Cell (FBC). It is a capacitor-less DRAM cell consisting of a MOSFET on an SOI wafer. Data “1” and Data “0” are distinguished by the hole density in the floating body of the MOSFET.

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Embedded Memories in SOI Thumbnail

Embedded Memories in SOI

Posted by (IBM) on December 6, 2006
In ASN #6, Design & Manufacturing, In & Around Our Industry
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Embedded DRAM on SOI is set to proliferate at the 45nm node. Embedded memory now occupies close to 75% of the total chip area. Until a few years ago, this memory was exclusively SRAM, but more recently the industry has seen a significant transition to embedded DRAMs (eDRAMs).

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