SOI and other engineered substrates drive power efficiency through the value chain.

For Silex Microsystems, SOI and TSI™ substrates figure among the company’s key starting materials. Silex Microsystems is the worldwide leading pure-play MEMS foundry, providing state-of-the-art, complete manufacturing capability in its two fabs (6” & 8”). Silex customers are found in the medical, biotech, telecommunications, consumer electronics and automotive industries. With its brand new 8” inch …

Transferring the entire layer of circuits from a processed wafer to the best substrate for the application is now available for custom manufacturing or technology transfer. The Soitec Group recently announced that Smart Stacking™, our circuit stacking technology, is ready for both manufacturing and technology transfer.

The Foundry Offering. The IP. The Collaboration. > It’s All Here IBM Announces the Industry’s First 45nm SOI Foundry Offering. IBM’s new 45nm SOI foundry offering is designed to meet the demands of emerging high-performance, low-power markets. The new offering adds ARM’s industry-standard design tools and libraries to the intellectual property (IP) already available through …

The new manufacturing facility will support the region’s 300mm SOI-based markets. The “Linking of Hands” during the opening ceremony for Soitec Singapore Pte. Ltd. Left to right: Paul Boudre, COO, Soitec Group; His Excellency Pierre Buhler, French Ambassador to Singapore; Guest of Honour Mr Lim Hng Kiang, Singapore Minister for Trade and Industry; Dr. André-Jacques …

This fall, ARM will be rolling out key physical IP libraries, opening the door to broad SOI adoption. As the leading processor IP company, ARM is collaborating with industry partners to facilitate the adoption of SOI CMOS technology. ARM’s optimized SOI Physical IP libraries target development of high-speed and low dynamicpower SoC designs in 45nm …

With SOI, the performance-power trade-off can be balanced without changing design methodology. If you’re a chip designer, what would it mean if you could measurably increase performance while keeping the same power consumption? Or, if you could meaningfully lower power consumption while retaining the same performance level? And what if you could do either one …

How tools from Mentor keep SOI transparent for design; flexible and robust for tapeout. The Mentor Graphics Calibre® nm Platform is built to provide maximum flexibility for designers and tapeout managers employing multiple technologies in their overall IC portfolio. Although SOI requires substantially different and somewhat more complex design rules compared to bulk CMOS, they …

SOI provides key advantages for analog designers. Here’s how and why. Many technical studies have shown that SOI CMOS technology offers substantial digital circuit performance improvements over bulk CMOS at the same lithography node. As more CMOS fabs transition to SOI to enable these gains, analog circuit designers are faced with the task of accommodating …

Innovations in RTP play a key role in SOI wafer production for 45nm and beyond. Rapid Thermal Processing (RTP) was introduced in silicon-on-insulator (SOI) wafer production for surface smoothing to combine thickness control and surface quality assurance. For sub-45nm technology node defect-free processing, RTP is an important step in the production cycle, as specifications become …