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The SOI Papers at VLSI ’14 (Part 2): Thumbnail

The SOI Papers at VLSI ’14 (Part 2):

Posted by on July 17, 2014
In Conferences, Editor's Blog, Paperlinks, R&D/Labnews
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Last week we posted Part 1 of our round-up of SOI papers at the VLSI Symposia – which included the paper showing that 14nm FD-SOI should match the performance of 14nm bulk FinFETs. (If you missed Part 1, covering the three big 14nm FD-SOI and 10nm FinFET papers, click here to read it now.) This […]

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The SOI Papers at VLSI ’14 (Part 1): Breakthroughs in 14nm FD-SOI, 10nm SOI-FinFETs Thumbnail

The SOI Papers at VLSI ’14 (Part 1): Breakthroughs in 14nm FD-SOI, 10nm SOI-FinFETs

Posted by on July 11, 2014
In Conferences, Editor's Blog, Paperlinks, R&D/Labnews
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The VLSI Symposia – one on technology and one on circuits – are among the most influential in the semiconductor industry. Three hugely important papers were presented – one on 14nm FD-SOI and two on 10nm SOI FinFETs – at the most recent symposia in Honolulu (9-13 June 2014). In fact, three out of four […]

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Is FD-SOI Cheaper? Why yes!

Posted by on June 27, 2014
In Design & Manufacturing, Editor's Blog, News & Viewpoints
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A debate is raging over at SemiWiki following a post there entitled “Is SOI Really Less Expensive?” by Scotten Jones (you can read it here). Within just over 48 hours, about 30 comments were made, with heavy hitters on both sides of the fence weighing in. While the post itself is about manufacturing economics, the […]

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Interview: Leti CEO Malier on the FD-SOI Breakthrough; Leti Days in Grenoble (24-26 June) & Semicon West Thumbnail

Interview: Leti CEO Malier on the FD-SOI Breakthrough; Leti Days in Grenoble (24-26 June) & Semicon West

Posted by on June 17, 2014
In Design & Manufacturing, Editor's Blog, News & Viewpoints
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Some years back, European research giant CEA-Leti made a major commitment to support FD-SOI, partnering with STMicroelectronics, Soitec and IBM.  Now, with the big FD-SOI foundry announcement by Samsung and STMicroelectronics, Leti’s ready to bring its vast expertise to players throughout the value chain, right up through design integration. To learn more about the range […]

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Synopsys Design Flow Support for Samsung-ST 28nm FD-SOI (With More Details on What Designers Need to Know) Thumbnail

Synopsys Design Flow Support for Samsung-ST 28nm FD-SOI (With More Details on What Designers Need to Know)

Posted by on June 8, 2014
In Design & Manufacturing, Editor's Blog
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Following the big FD-SOI/EDA news, Synopsys has provided ASN with more details for designers.             The Synopsys’ Galaxy Design Platform has been extended to support the Samsung-STMicroelectronics strategic agreement on 28nm FD-SOI (see press release here). They’ve covered all the bases, so that designers going to Samsung’s foundry services for […]

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Samsung Foundry Marketing Director Writes About Extending 28nm With FD-SOI Thumbnail

Samsung Foundry Marketing Director Writes About Extending 28nm With FD-SOI

Posted on May 28, 2014
In Design & Manufacturing, Editor's Blog, News & Viewpoints
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Samsung’s Senior Director Foundry Marketing Kelvin Low blogged enthusiastically about the recent Samsung-STMicroelectronics FD-SOI announcement  on the company’s website. He has graciously agreed to let ASN repost it here – and says we’ll be hearing more from him in the future.   Without further ado, here’s what he said:   While 14nm FinFET is the darling […]

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It’s Samsung! Announcement with ST confirms new tier-1 foundry for faster, cooler, simpler 28nm FD-SOI Thumbnail

It’s Samsung! Announcement with ST confirms new tier-1 foundry for faster, cooler, simpler 28nm FD-SOI

Posted by on May 14, 2014
In Design & Manufacturing, Editor's Blog, News & Viewpoints
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Great news: Samsung and STMicroelectronics have revealed that Samsung is the new 28nm FD-SOI foundry (see the press release here.) Specifically, the two companies announced, “…a comprehensive agreement on 28nm Fully Depleted Silicon-on-Insulator (FD-SOI) technology for multi-source manufacturing collaboration.” The agreement covers ST’s 28nm FD-SOI design platform: the design enablement ecosystem and the process technology. […]

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A New Top-Tier FD-SOI Foundry – But Which One?

Posted by on May 7, 2014
In Editor's Blog, News & Viewpoints
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By Adele Hars, ASN Editor-in-Chief Speculation is mounting following ST’s April 28th announcement that they’d signed on a new first-tier foundry for 28nm FD-SOI manufacturing.  As of this posting, they haven’t yet said which one it is. The social media-sphere is abuzz about the mystery foundry – with posters in LinkedIn groups, Twitter, SemiWiki and […]

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FD-SOI Keeps Moore’s Law on Track Thumbnail

FD-SOI Keeps Moore’s Law on Track

Posted by on February 28, 2014
In Editor's Blog, News & Viewpoints
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Take a look at this graph – it’s obvious, isn’t it? FD-SOI is significantly cheaper, outdoes planar bulk and matches bulk FinFET in the performance/power ratio, and keeps the industry on track with Moore’s Law. This was part of a presentation by ST’s Joël Hartmann (EVP of Manufacturing and Process R&D, Embedded Processing Solutions) during Semi’s […]

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FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range Thumbnail

FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range

Posted by on February 20, 2014
In Conferences, Design & Manufacturing, Editor's Blog, R&D/Labnews
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Body-biasing design techniques, uniquely available in FD-SOI, have allowed STMicroelectronics and CEA-Leti to demonstrate a DSP that runs 10x faster than anything the industry’s seen before at ultra-low voltages (read press release here). In the mobile world (not to mention the IoT), the role of DSPs is becoming ever more important. All those things you […]

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