ASN

Archive of Editor’s Blog

Editor's Blog

FD-SOI – A Look at Recent Consortium Results<br />Part 1 of 3: Manufacturing Thumbnail

FD-SOI – A Look at Recent Consortium Results
Part 1 of 3: Manufacturing

Posted by Adele HARS on February 16, 2012
In Editor's Blog
Tagged with , , , , , , , , , , ,

The results of the most recent SOI Consortium benchmarking study detail the interest of planar FD-SOI as early as the 28nm and 20nm technology nodes, in terms of performance, power and manufacturability. This 3-part blog series looks further at some of the implications. Chipmakers constantly have to manage risk.  Generally it is sensible not to …

Continue ReadingLeave a Comment
GF’s NY Fab 8 Debuts with IBM’s 32nm SOI Thumbnail

GF’s NY Fab 8 Debuts with IBM’s 32nm SOI

Posted by Adele HARS on January 16, 2012
In Editor's Blog
Tagged with , , , ,

Excellent news:  the first chips produced at GlobalFoundries’ “Fab 8″ in upstate New York are based on IBM’s latest, 32nm SOI chip technology. In a joint press release, the two companies announced that the chips will be used by customers in networking, gaming and graphics. While the new chips began initial production at IBM’s 300mm …

Continue ReadingLeave a Comment
SOI Conference Shows SOI Driving Key Roadmaps Thumbnail

SOI Conference Shows SOI Driving Key Roadmaps

Posted by Adele HARS on October 14, 2011
In Editor's Blog
Tagged with , , , , , , , ,

The 2011 IEEE SOI Conference, held in Tempe, AZ last week was not one to miss…but I did. Happily, I got the papers right away, along with observations shared by some of the folks who did get there. Highlights include excellent and insightful papers from ST, ARM, IBM, Intel, Peregrine and GlobalFoundries, plus many more that indicate …

Continue ReadingLeave a Comment
Major paper on porting SOC designs from bulk to FD-SOI released by SOI Consortium Thumbnail

Major paper on porting SOC designs from bulk to FD-SOI released by SOI Consortium

Posted by Adele HARS on October 3, 2011
In Editor's Blog
Tagged with , , , , , , , , , ,

What are you going to do with your SOCs at 20/22nm? The options seem to boil down to just staying on bulk CMOS, or changing to FinFETs or planar, fully-depleted (FD) SOI-based CMOS. Though some may find comfort in staying on bulk CMOS, it’s getting very complicated – and complicated get expensive fast. The FinFET …

Continue ReadingLeave a Comment
Ultra-thin wafers for 450mm FD-SOI on schedule Thumbnail

Ultra-thin wafers for 450mm FD-SOI on schedule

Posted by Adele HARS on September 19, 2011
In Editor's Blog
Tagged with , , ,

Engineered substrates like SOI wafers need to be ready years in advance of any major shift in technology – and before much of the rest of the materials and equipment. The fabs and foundries as well as the entire design chain – need real wafers they can work with early on to meet R&D and …

Continue ReadingLeave a Comment

FD-SOI Foundations Ready, Say Semi Execs

Posted by Adele HARS on August 30, 2011
In Editor's Blog
Tagged with , , , , , , ,

SOI (especially fully depleted “FD-SOI”) was a hot topic in the video and audio interviews that Debra Vogler of SST released recently. Here are brief summaries of the most important SOI-related interviews – with top brass from Leti, Soitec, KT, EVG and Qcept –  that she made at Semicon West ’11. (If you need a …

Continue ReadingLeave a Comment

Study Shows FD-SOI Most Cost-Effective Approach at 22nm

Posted by Adele HARS on August 1, 2011
In Editor's Blog
Tagged with , , , ,

A new IC Knowledge report examines the costs of potential solutions for a foundry at 22nm. What are you doing at 22nm? The debate is raging in the press and forums alike. Now research firm IC Knowledge has issued a report showing that from a straight cost perspective, planar FD-SOI is a better choice than …

Continue ReadingLeave a Comment
New Wii U™ on SOI Thumbnail

New Wii U™ on SOI

Posted by Adele HARS on July 5, 2011
In Editor's Blog
Tagged with , ,

Nintendo’s next high-profile, high-volume CPU will leverage IBM’s 45nm SOI  for performance, power and eDRAM. If you’ve followed the ASN “Buzz” in recent weeks, you’ve seen the news: the CPU for Nintendo’s upcoming (and very cool) Wii U is on 45nm SOI. IBM’s been fabbing chips for Nintendo for over a decade, and first moved …

Continue ReadingView Comments (1)
Get Smart Thumbnail

Get Smart

Posted by Adele HARS on June 1, 2011
In Editor's Blog
Tagged with , , ,

ST’s latest BCD shows how SOI yet again enables huge reductions in power consumption. What if you had to reduce power dissipation by 40x? That’s exactly the task that fell to ST, under an EU program called Smart Power Management. At the recent ISPSD (International Symposium on Power Semiconductor Devices and ICs) conference, STMicroelectronics and …

Continue ReadingLeave a Comment
FD-SOI: The Right Choice Thumbnail

FD-SOI: The Right Choice

Posted by Adele HARS on May 14, 2011
In Editor's Blog
Tagged with , , , , , , ,

Although Intel will do FinFETs at 22nm, FD-SOI remains the better alternative for most all the industry for low power and mobile apps. In the weeks and months to come, we’ll continue hearing  the SOI camp addressing key points. 1. FD-SOI technology is the most cost-effective solution. The wafers are available from multiple sources. With …

Continue ReadingLeave a Comment