One of the world’s leading SOI experts considers Smart Cut innovations and future potential. I remember a meeting with a PhD student, over ten years ago. He was supposed to work on SIMOX material: at that time, a perfect topic in a perfect SIMOX group with Michel Bruel, André Auberton and Jean-Michel Lamure around. Oddly, …

Replacing epitaxy with bonding could pave the way for 4” substrates. Gallium nitride (GaN) based blue-white HB-LEDs (High-Brightness LEDs) are now at full production level, posting a CAGR of over 51% and targeting markets in automotives, IT, and general lighting.

Luxtera explains the role of SOI in its new technology. Luxtera Inc., a fabless semicon-ductor company and the world leader in silicon photonics, announced recently that it has solved the longstanding problem of building advanced photonic interfaces into mass-produced silicon chips. For the first time, it is possible to integrate high-speed optical fiber interfaces in …

Two distinct technical strategies for advanced substrates will mark the 45nm node. One will be focused on high performance, the other driven by system-on-chip (SOC) applications, including low power, portable RF applications. The high performance path will drive the most advanced substrates and material innovations. Engineered substrate solutions include ultra-thin (UT) SOI, mobility enhancing substrates …

Ongoing since 2002, the MEDEA+ T206 CMOS SOI project is scheduled to finish up this September. The objective is: “…to evaluate, design and manufacture a family of CMOS silicon-on- insulator (SOI) circuits for low-power portable, radio frequency (RF) wireless and high-speed applications to compete with more expensive CMOS and bipolar CMOS (BiCMOS) devices.” The program, …

In January of this year, Soitec announced its participation as the SOI substrate supplier in an ATDF development program focusing on multi-gate field effect transistor (MuGFET) technology for the 45-nm node and below. Soitec has now presented joint papers with Texas Instruments and Infineon Technologies at various technical conferences on MuGFETs, which are promising non-planar …

Now in its third year, Soitec’s Characterization Lab in Bernin proposes a whole battery of electrical and physico-chemical tests such as Psi-Mos, Hg-fet, CV, Box integrity, BMD and SECCO on SOI, sSOI and new materials. R&D researchers in the lab are developing new characterization techniques for future needs. The lab is audited regularly by customers, …

A preliminary public version of the “EUROSOI State of the Art Report” is now available at www.eurosoi.org. It compiles the contributions of more than 150 researchers/experts from 14 European countries active in SOI technology, devices and systems. A listing of current European and national SOI projects is also available on the site •

• High Growth Projected for GaN According to a recent report in “SST” magazine, the Silicon Valley-based market research firm Strategies Unlimited is projecting substantial growth for the gallium nitride (GaN) market. Worth $3.2 billion in 2004, the market is expected to increase to $7.2 billion over the next five years, making it one of …

The reticle used for this wafer is a 45nm technology test vehicle. Lithography was done using a 193nm wavelength scanner. Devices are made on a Soitec™ UNIBOND™ SOI wafer (88nm Si thickness / 145nm BOx thickness). The reticle was designed to print fins down to 30nm fin width and it incorporated various capacitors, NMOS/PMOS/CMOS transistors …