Want to learn first-hand what’s going on in the world of FD-SOI? (aka Fully-Depleted Silicon-On-Insulator) The SOI Industry Consortium, CEA-Leti and Soitec are organizing the 6th edition of the Fully Depleted Workshop. Presentations will be given by experts from ST, ARM, IBM, Leti, UCBerkeley, Soitec, Accelicon & the SOI Consortium. It’s a full-day event at …

Highlights from the IEEE 2011 SOI Conference include presentations by ST, ARM, IBM, Intel, Leti, Peregrine, GlobalFoundries and more. The 2011 IEEE SOI Conference, held in Tempe, AZ this past October was not one to miss. Highlights include excellent and insightful papers from ST, ARM, IBM, Intel, Leti, Peregrine and GlobalFoundries, plus many more that …

The third installment in the SOI Consortium’s ongoing FD SOI Workshop series, the Tokyo event was a major success. The University of Tokyo recently hosted a hugely successful one-day workshop on the FD SOI ecosystem’s readiness. The event took place on Saturday, the 25th of September 2010, at the University of Tokyo’s Komaba Research Campus, …

For 35 years the IEEE/Electron Devices Society’s SOI Conference has been the premier meeting of engineers and scientists dedicated to current trends in SOI. The papers presented at the IEEE/EDS SOI Conference give a good indication of what’s in the pipeline for the industry. This year’s hot topics included FD-SOI, energy efficiency, modeling and design, …

The IEEE’s International Electron Devices Meeting (IEDM) is the world’s showcase for the most important applied research breakthroughs in transistors and electronics technology. Here are a few highlights from some of the papers that presented advances in SOI-based devices and architectures at the most recent meeting (December 2008, San Francisco).

Hitachi demonstrates why it has the smallest Vth variability, and identifies the remaining components of random doping fluctuation. In a “Comprehensive Study on Vth Variability in Silicon on Thin BOX (SOTB) CMOS with Small Random-Dopant Fluctuation: Finding a Way to Further Reduce Variation,” (N. Sugii et. al., IEDM 2008) Hitachi scientists at the Central Research …

Leti, Soitec and ST have discovered the sources of threshold voltage variation in undoped, ultrathin FD-SOI architectures. At the most recent IEDM conference, researchers from Leti, Soitec and STMicroelectronics presented a paper entitled, “High Immunity to Threshold Voltage Variability in Undoped Ultra-Thin FDSOI MOSFETs and its Physical Understanding” (O. Weber et al, IEDM 2008).

IEDM’08 Conquering the Challenge of Threshhold Voltage Variability At the most basic level, a transistor is turned on if the gate voltage is higher than the threshold voltage. That makes reducing variability in threshold voltage (which can be abbreviated as either σVth or σVt) critical.