Want to learn first-hand what’s going on in the world of FD-SOI? (aka Fully-Depleted Silicon-On-Insulator) The SOI Industry Consortium, CEA-Leti and Soitec are organizing the 6th edition of the Fully Depleted Workshop. Presentations will be given by experts from ST, ARM, IBM, Leti, UCBerkeley, Soitec, Accelicon & the SOI Consortium. It’s a full-day event at …

Highlights from the IEEE 2011 SOI Conference include presentations by ST, ARM, IBM, Intel, Leti, Peregrine, GlobalFoundries and more. The 2011 IEEE SOI Conference, held in Tempe, AZ this past October was not one to miss. Highlights include excellent and insightful papers from ST, ARM, IBM, Intel, Leti, Peregrine and GlobalFoundries, plus many more that …

SOI is at the heart of silicon photonics. Here’s an overview of past, present and future trends. The existence of Silicon Photonics owes much to serendipity. During the early years of the development of SOI wafer technology probably nobody anticipated that SOI would be a perfect medium for short distance transmission and modulation of light …

Transferring a processed (or partially processed) layer of circuits from one wafer onto another enables innovative new solutions for BSI, MEMS, RF, 3D and more. Smart Stacking™ is Soitec’s wafer-to-wafer stacking technology platform for partially or fully processed wafers (see Figure 1). It enables the transfer of very thin processed layers in a high-volume production …

GaN-on-Si is moving towards becoming a cost-effective enabler for next-generation LED and power devices. During the past decade gallium nitride (GaN) has become an important compound semiconductor as it enables numerous key applications in optoelectronics and in power electronics. GaN LED technology could well be the Holy Grail in terms of providing the next generation …

Researchers in academia have partnered with industry to increase understanding of critical issues in advanced non-classical CMOS devices. Highly scaled devices present a new range of challenges with respect to critical issues such as leakage current, short-channel effects, high-field effects, variability, reliability, noise and parasitic impact. Device structure and material innovation are the primary enablers …

The third installment in the SOI Consortium’s ongoing FD SOI Workshop series, the Tokyo event was a major success. The University of Tokyo recently hosted a hugely successful one-day workshop on the FD SOI ecosystem’s readiness. The event took place on Saturday, the 25th of September 2010, at the University of Tokyo’s Komaba Research Campus, …

For 35 years the IEEE/Electron Devices Society’s SOI Conference has been the premier meeting of engineers and scientists dedicated to current trends in SOI. The papers presented at the IEEE/EDS SOI Conference give a good indication of what’s in the pipeline for the industry. This year’s hot topics included FD-SOI, energy efficiency, modeling and design, …

Leading equipment and materials suppliers have created the European 450mm Equipment and Materials Initiative – or EEMI 450, for short. The steering committee comprises two substrate manufacturers (Soitec and Siltronic), three equipment suppliers (ASML, ASM, Recif), academics (IMEC, FHG) and Intel. EEMI 450’s global counterparts are ITB-J (Interoperability Test Bed – Japan) and ISMI (International …

Key advances in transistor research start on SOI. SOI has always been the substrate of choice to explore new silicon device concepts and structures. The full dielectric isolation of the silicon allows one to dismiss the sometimes complex junction isolation schemes used in bulk silicon. The possibility of making devices in thin silicon films has …