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FD-SOI – A Look at Recent Consortium Results<br />Part 3 of 3: 20nm FD-SOI comes out way ahead Thumbnail

FD-SOI – A Look at Recent Consortium Results
Part 3 of 3: 20nm FD-SOI comes out way ahead

Posted by on February 29, 2012
In Editor's Blog
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The results of the most recent SOI Consortium benchmarking study detail the interest of planar FD-SOI as early as the 28nm and 20nm technology nodes, in terms of performance, power and manufacturability. This 3-part blog series looks further at some of the implications. The SOI Industry Consortium announcement at the end of the year provided …

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FD-SOI – A Look at Recent Consortium Results<br />Part 2 of 3: Power & Performance Thumbnail

FD-SOI – A Look at Recent Consortium Results
Part 2 of 3: Power & Performance

Posted by on February 23, 2012
In Editor's Blog
Tagged with , , , , , , , , , , ,

The results of the most recent SOI Consortium benchmarking study detail the interest of planar FD-SOI as early as the 28nm and 20nm technology nodes, in terms of performance, power and manufacturability. This 3-part blog series looks further at some of the implications. Fully depleted transistor architectures such as Planar FD-SOI, FinFETs (which is also …

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FD-SOI – A Look at Recent Consortium Results<br />Part 1 of 3: Manufacturing Thumbnail

FD-SOI – A Look at Recent Consortium Results
Part 1 of 3: Manufacturing

Posted by on February 16, 2012
In Editor's Blog
Tagged with , , , , , , , , , , ,

The results of the most recent SOI Consortium benchmarking study detail the interest of planar FD-SOI as early as the 28nm and 20nm technology nodes, in terms of performance, power and manufacturability. This 3-part blog series looks further at some of the implications. Chipmakers constantly have to manage risk.  Generally it is sensible not to …

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FD-SOI Workshop in SF Follows ISSCC – Registration (Free!) Now Open Thumbnail

FD-SOI Workshop in SF Follows ISSCC – Registration (Free!) Now Open

Posted on February 7, 2012
In Advanced Substrate Corners, Conferences
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Want to learn first-hand what’s going on in the world of FD-SOI? (aka Fully-Depleted Silicon-On-Insulator) The SOI Industry Consortium, CEA-Leti and Soitec are organizing the 6th edition of the Fully Depleted Workshop. Presentations will be given by experts from ST, ARM, IBM, Leti, UCBerkeley, Soitec, Accelicon & the SOI Consortium. It’s a full-day event at …

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IEDM 11: The SOI Papers Thumbnail

IEDM 11: The SOI Papers

Posted on February 7, 2012
In Paperlinks

Held every December, the IEEE International Electron Devices Meeting (IEDM) (www.ieee-iedm.org) presents the best applied research in electronics from corporate, university and government labs around the world. Brief descriptions of the IEDM 2011 papers with research related to SOI and some other advanced substrates follows. The full program is available at: http://www.his.com/~iedm/program/11advprg.pdf The papers themselves …

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