Industry Buzz


  • May 11, 2016 - FD-SOI will be featured in the upcoming Symposia on VLSI Technology & Circuits (Honolulu, Hawaii from June 13-17, 2016 – click here for more info). The theme of the conference is “Inflections for a Smart Society,” and luminaries from throughout the SOI ecosystem will be featured in presentations, short courses and panel discussions. - A short course entitle “Circuit Design... Read more »
  • April 29, 2016 - From RF-SOI pioneer Peregrine Semi comes a steady stream of new chips and design wins. - News include: - Two UltraCMOS® MPAC–Doherty products—the PE46130 and PE46140 (press release here). These monolithic phase and amplitude controllers (MPAC) join the PE46120 in offering maximum phase-tuning flexibility for Doherty power amplifier (PA) optimization. Designed for the LTE and LTE-A... Read more »
  • April 25, 2016 - Registration is open for GlobalFoundries' technical webinar, “How to Implement an ARM Cortex-A17 Processor in 22FDX 22nm FD-SOI Technology” (click here to go to the registration page). The webinar will cover the optimal steps to successfully implement ARM® Cortex®-A Series* processors using 22FDXTM 22nm FD-SOI technology. - GF Design Enablement Fellow Dr. Joerg Winkler will... Read more »
  • April 7, 2016 - GlobalFoundries recently announced availability of a new set of RF-SOI PDKs for the company's 7SW SOI technology. GF, which has now delivered more than 20 billion RF-SOI chips for the world’s smartphones, tablets and more, notes that its 7SW SOI technology is optimized for multi-band RF switching in next-generation smartphones. It is also poised to drive innovation in IoT... Read more »
  • April 5, 2016 - Three of the world's More-than-Moore and SOI technology development powerhouses have signed a comprehensive agreement for ongoing collaboration and cooperation in developing new technologies for the emerging IoT market. SITRI of Shanghai, and CEA-Leti and Minatec of Grenoble will work together to accelerate the adoption of their latest technologies and create a global innovation... Read more »
  • March 31, 2016 - Coupling Wave Solutions (CWS) has a new productivity tool called SiPEX, which enables RF-SOI designers to increase the number of design iterations—including Spice simulation—up to 10 times in the same time frame. - “With SiPEX, RF switch designers will be able to make their design changes in less than 15 minutes and obtain a few decibels (dB) of variation over silicon measurements... Read more »
  • March 23, 2016 - Don't forget to get your paper submitted to the top conference with a major focus on the SOI ecosystem: the IEEE S3S (SOI/3D/SubVt). The Call For Papers (CFP) deadline is April 15, 2016. As we noted for you in ASN back in December, the theme of the conference, which will take place October 10th – 13th in San Francisco, is “Energy Efficient Technology for the Internet of Things”. -... Read more »
  • March 18, 2016 - EDI CON China 2016, taking place April 19-21 in Beijing at the China National Convention Center (CNCC) will feature a keynote talk by GlobalFoundries' Peter Rabbeni, Sr. Director, RF BU Business Development & Product Marketing. The talk, entitled, "RF SOI: Revolutionizing Radio Design Today and Driving Innovation for Tomorrow",will kick off the newly added RF-SOI Technology Track.... Read more »
  • February 12, 2016 - Peregrine Semiconductor’s new 75-ohm glitch-less RF digital step attenuator, the UltraCMOS® PE4314, is ideal for wired broadband applications. - RF-SOI pioneer Peregrine Semiconductor has announced theUltraCMOS® PE4314, a 75-ohm glitch-less RF digital step attenuator (DSA). This new DSA extends Peregrine’s existing glitch-less DSA portfolio to 75 ohms. The PE4314 is ideal for... Read more »
  • February 8, 2016 - Professor Jean-Pierre Raskin (right) receiving the Blondel Medal for his industry-changing work on RF-SOI. Jury president Professor Pere Rocal I Cabarrocas (left) of the Ecole Polytechnique - Université Paris-Saclay presented the prize. - RF-SOI substrate guru Jean-Pierre Raskin, whose team at UCL* has driven the technology behind the most advanced wafer substrates for RF applications,... Read more »
  • February 3, 2016 - Design & Reuse, in partnership with GlobalFoundries, ST, Soitec and Leti, is sponsoring a series of FD-SOI IP Workshops around the globe. (Click here for more information.) These working days aim at sharing information about IP that’s currently available or is being designed for FD-SOI technology. - The first conference will take place during DATE in Dresden on 14 March 2016.... Read more »
  • December 23, 2015 - Mentor Graphics is collaborating with GlobalFoundries on 22nm FD-SOI to qualify the Mentor® RTL to GDS platform for the current version of GlobalFoundries 22FDX™ platform reference flow. (Read the press release here.) This includes including Mentor's RealTime Designer™ physical RTL synthesis solution and Olympus-SoC™ place & route system. In addition, Mentor and GF are... Read more »
  • December 22, 2015 - Peregrine Semiconductor’s new UltraCMOS® PE44820 is an 8-bit digital phase shifter that delivers exceptional phase accuracy and high linearity for active antenna applications. - RF-SOI pioneer Peregrine Semiconductor has introduced the UltraCMOS® PE44820, an 8-bit digital phase shifter designed for active antenna apps, covering a 358.6-degree phase range. (Read the press release... Read more »
  • December 19, 2015 - Soitec CEO Paul Boudre - VLSI Research Chip Insider has named Soitec CEO Paul Boudre to its roster of 2015 All Stars of the Semiconductor Industry. (See the announcement here.) - Boudre was cited for “...successfully re-organizing Soitec back to its core business as a leading innovative engineered substrate supplier. His first year results are already astounding, with very high growth... Read more »
  • December 17, 2015 - The IEEE S3S (SOI/3D/SubVt) has issued its call for papers for the 2016 conference (click here for details). The theme of the conference, which will take place October 10th – 13th in San Francisco, is "Energy Efficient Technology for the Internet of Things". This industry-wide event gathers together widely known experts, contributed papers and invited talks focused on SOI Technology,... Read more »

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SPOTlight on Smart Power

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, R&D/Labnews
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SOI-based Smart Power Innovator Atmel leads new Medea+ program. Atmel, a leading proponent of SOI for Smart Power, is heading up a new Medea+ program called SPOT-2 (program #2T205), for Deep Sub-micron Smart-Power Technologies. The 3-year program aims to develop a new generation of Smart Power Technologies for automotive and consumer applications. More than a […]

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Industry SOI Innovators in Core Group Guiding Massive European Nanoelectronics Initiative

Posted on May 11, 2007
In ASN #7, In & Around Our Industry, R&D/Labnews
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Eight key industrial players in nanoelectronics have created the legal entity for partnering with the EC’s €3 billion Joint Technology Initiative. With the legalities now in place, the greater nanoelectronics community is set to play a significant role in defining the future of nanoelectronics R&D in Europe.

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High-k and Metal Gates Pave the Way to Further Innovation Thumbnail

High-k and Metal Gates Pave the Way to Further Innovation

Posted by (Soitec) on May 11, 2007
In Advanced Substrate Corners, ASN #7, R&D/Labnews
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Here’s why HK+MG+SOI promises to be a winning combination. Seen as a necessary innovation to assure the IC scaling path, high-k gate dielectrics combined with metal gates have been in development for more than a decade. Recent announcements by IC technology leaders highlight the transition from R&D to early manufacturing for high-k and metal gate […]

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A Perspective on Multi-Gate MOSFETs Thumbnail

A Perspective on Multi-Gate MOSFETs

Posted by (UF Gainesville) on May 11, 2007
In Advanced Substrate Corners, ASN #7, Professor's Perspective
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One of the world’s leading experts, Professor Fossum explains why SOI represents a pragmatic approach to future transistor generations. Based on our recent studies of multi-gate MOSFETs (“MuGFETs”) for CMOS applications, which are mainly modeling- and simulation-based with experimental support from Freescale Semiconductor, we have suggested that nanoscale FinFETs can and should be designed pragmatically, […]

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Towards an Engineered Substrates Ecosystem: A Model for Collaborative Innovation

Posted by (Soitec) on May 11, 2007
In ASN #7, News & Viewpoints, SOI In Action
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The CEO and co-founder of Soitec shares his vision of how partnership speeds the proliferation of SOI and other engineered substrates. The advanced substrate community has made terrific strides in deploying SOI and reaping the benefits thereof. The current model of ad hoc collaboration – supplier-to-client, partner-to-partner, manufacturer-to-customer – has been instrumental in moving SOI […]

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