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Industry Buzz

INDUSTRY BUZZ

  • May 14, 2015 - Cassette carrying several hundred chips intended for 100 Gb/s transceivers, diced from wafers fabricated with IBM SOI-CMOS Integrated Nano-Photonics Technology. The dense monolithic integration of optical and electrical circuits and the scalable manufacturing process provide a cost-effective silicon photonics interconnect solution, suitable for deployment in cloud servers, datacenters,... Read more »
  • May 14, 2015 - International research teams working on or interested in the far-reaching SOIPIX radiation-detector project have a workshop coming up in June. The project was originally started by KEK* scientists to develop a new detector technology and quantum beam imaging for high-energy particle physics. As research teams around the world (including Japan, USA, China and Europe) joined to take... Read more »
  • April 30, 2015 - A recent GlobalFoundries blog entitled RF-SOI is IoT's Future, and the Future is Bright (read it here) says, “RF SOI is a win-win technology option that can improve performance and data speed in smartphones and tablets, and it is expected to play a key role in the Internet of Things applications as well.” - The blog touches on the full range of benefits of RF-SOI for front-end... Read more »
  • April 30, 2015 - Presentations given at the ‘Beyond Computing' Innovative Technologies Symposium (March 2015 in Shanghai) are now available on the SOI Consortium website (click here to see the list). The Symposium covered MEMS, semiconductor manufacturing, RF and power, which are key topics for the fast growing “More than Moore” industry. The one-day, closed-door symposium was organized by members... Read more »
  • April 27, 2015 - RF-SOI will play a key role in the IoT plans of analog and mixed-signal specialist MagnaChip (read the press release here). The company has launched a task force to address IoT. The statement says, “MagnaChip also offers 0.18 micron and plans to offer 0.13 micron Silicon on Insulator (SOI) RF-CMOS technologies, which is suitable for use in antenna switching, tuner and Power Amplifier... Read more »
  • April 27, 2015 - Research and consulting group Semico has issued a new report entitled SOI Update 2015: Finding New Applications (for information on getting a copy of the report, click here). As described on the Semico website: “With the recent growth in RF-SOI for switches and integrated solutions for RF functions such as power amplifiers and transceivers, the opportunities for growth in SOI wafer... Read more »
  • April 21, 2015 - SFARDS' SF3301 cryptocurrency ASIC is the world’s first chip to use 28nm FD-SOI. Surpassing expecttions, it operates at a stunning 0.45V. (Courtesy: SFARDS) - Right on schedule, the SFARDS cryptocurrency ASIC on 28nm FD-SOI has made its debut in silicon, and is surpassing expectations. In what is clearly a stunning success, the company announced that the ASIC’s lowest working... Read more »
  • April 21, 2015 - TEM cross-section of FDSOI transistor (Courtesy of STMicroelectonics) - CEA-Leti’s newest version of its advanced compact model for FD-SOI is now available in all major SPICE simulators (get the press release here). The Leti-UTSOI2.1 is the latest version of Leti’s compact model for FD-SOI, which was first released in 2013. (Compact models of transistors and other elementary devices... Read more »
  • April 9, 2015 - In a new YouTube video, Samsung’s Sr. Director of Foundry Marketing, Kelvin Low, makes a strong case for 28nm FD-SOI, especially for ultra-low-power, IoT, wearables, networking and automotive apps. The five-minute video was taped by ChipEstimate.TV host Sean O’Kane during the Cadence User Conference (CDNLive, Silicon Valley, March 2015 – click here to see it). While the first half... Read more »
  • April 9, 2015 - Hua Hong Semiconductor of Shanghai (a pure-play 200mm foundry operated by HHGrace Semi) recently launched a 0.2μm RF-SOI process design kit (PDK) (click here to read the full press release). The 0.2μm RF-SOI technology platform has been successfully validated and is ready for customers product design and development, says the company. It is tailored and optimized for wireless RF... Read more »
  • March 27, 2015 - The Heterogeneous Technology Alliance (HTA), a coalition of top European R&D organizations, is offering an SOI-MEMS platform. Looking to bridge the gap between academia and industry, this technological platform pools the SOI-MEMS expertise, capabilities and fabrication facilities of Leti (France), Fraunhofer (Germany), CSEM (Switzerland) and VTT (Finland). - The main focus of HTA... Read more »
  • March 27, 2015 - Peregrine Semiconductor teams with Murata to announce the 2015 UltraCMOS® Global 1 Initiative. This new initiative seamlessly integrates the PE56500 all-CMOS RF-SOI front-end solution and Murata filters. - Peregrine Semiconductor and Murata have launched the 2015 UltraCMOS® Global 1 Initiative, which includes the UltraCMOS Global 1 PE56500 and seamlessly integrates Murata filters and... Read more »
  • March 11, 2015 - Cryptocurrency mining hardware company SFARDS is preparing to release its debut miner, which is built on a 28nm FD-SOI ASIC, by April 2015. (You can read the announcement here.) - At the time of this post, tape out of the company’s SF3301ASIC has been announced as complete. Cryptocurrency (the best-known example of which is Bitcoin) depends on “ledgers” supported by bitcoin... Read more »
  • March 11, 2015 - X-FAB is running a series of webinars on very high-temperature design the 18th and 19th of March 2015. A pure-play analog/mixed-signal and specialty foundry, X-FAB’s broad portfolio includes SOI CMOS processes for use at high temperatures up to 225°C. The event is free, but space is limited, so sign up here. - As noted in the program announcement, an increasing number of applications... Read more »
  • March 5, 2015 - With a special blog and video invitation, Samsung pulled out the stops to help get the word out about the recent FD-SOI workshop in San Francisco. Kelvin Low, Sr. Director Foundry Marketing,SamsungSSI, posted Design Faster, Cooler, Smaller Chips with Samsung Foundry’s 28nm FD-SOI Process Technology (read it here). Embedded in the blog is a YouTube video encouraging people to attend... Read more »

Latest posts
The New Generation: It’s All On SOI Thumbnail

The New Generation: It’s All On SOI

Posted on December 6, 2006
In ASN #6, End-User Apps, SOI In Action
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The PS3, Wii and Xbox 360 CPU design teams all chose SOI. Here’s why. Design challenges (Read the Cell overview paper by Kahle et al on the IBM website) Achieve 100 times the PlayStation®2 performance. Joint developers IBM, Sony Group and Toshiba needed to co-optimize the chip area, design frequency, and product operating voltage, creating […]

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Hitachi’s tiny mu-chip Thumbnail

Hitachi’s tiny mu-chip

Posted on December 6, 2006
In ASN #6, End-User Apps, SOI In Action
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Already the world’s smallest RFID chip, SOI makes the next generation far thinner than a piece of paper – while radically increasing productivity. The next generation of Hitachi’s µ-chip (mu-chip) is poised to make a major impact on the RFID (radio frequency identification) world. Presented at the IEEE conference in February 2006, this latest version […]

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Full use of SOI advantages enables small, thin, and low-cost RFIDs Thumbnail

Full use of SOI advantages enables small, thin, and low-cost RFIDs

Posted by (Hitachi) on December 6, 2006
In ASN #6, End-User Apps, SOI In Action
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A lead developer of Hitachi’s µ-chip explains the SOI benefits. By using SOI, we could make an ultra-small RFID chip. In particular, its excellent isolation capability enabled successful miniaturization of the analog circuits in the front-end of the part. Also, BOX (Buried OXide) acts as an etch-stop layer in the self-controlled process, resulting in an […]

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UT BOX SOI: Engineering for Future Low-Power Applications Thumbnail

UT BOX SOI: Engineering for Future Low-Power Applications

Posted by (Soitec) on December 6, 2006
In Advanced Substrate Corners, ASN #6, R&D/Labnews
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Ultra-thin buried oxide may solve some key design challenges at 32nm. Leading-edge microprocessors built on SOI have maximized performance while respecting the power budget by decoupling the Si surface from the substrate with a 150nm-thick buried oxide (BOX). However, moving towards low-power, high- or mid-performance CMOS applications, an increased coupling between the top layer of […]

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Nanomembranes: Just Around the Bend Thumbnail

Nanomembranes: Just Around the Bend

Posted by (UW Madison) on December 6, 2006
In Advanced Substrate Corners, ASN #6, Professor's Perspective
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Starting with SOI wafers, Professor Lagally’s team has developed strain-engineered silicon nanomembranes that could pave the way to flexible, high-speed circuits and more. SOI, beyond its well-known use in CMOS devices, provides the foundation for a new class of structures: strain engineered Si nanomembranes. These membranes offer the promise for new devices or increased performance […]

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