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Industry Buzz

INDUSTRY BUZZ

  • September 1, 2014 - An excellent article in SST details Leti's monolithic 3D (M3D) technology, as presented at the SemiconWest 2014 Leti Day (read the full article here). Written by Brian Cronquest, MonolithIC 3D's VP Technology & IP, the piece covers a presentation given by Olivier Faynot, Leti’s Device Department Director, about “monolithic 3D technology as the 'solution for scaling'.”... Read more »
  • September 1, 2014 - Murata and Peregrine Semiconductor have entered into a definitive agreement under which Murata will acquire all outstanding shares of Peregrine not owned by Murata (read full press release here). Peregrine will become a wholly owned subsidiary of Murata and continue with its current business model of solving the world’s toughest RF challenges. Peregrine supplies many wireless markets,... Read more »
  • August 21, 2014 - imec's 28Gb/s silicon photonics platform for optical interconnects and other optical applications will be included in an upcoming multiproject wafer run, reports R. Colin Johnson in EETimes (read the article here). These runs, which are on SOI wafers, are a joint effort by ePIXfab (founded by imec and Leti), Europractice IC and MOSIS. They provide a cost-effective vehicle for fabless... Read more »
  • August 21, 2014 - Peter Clark at Electronics360 wrote about a recent presentation by an STMicroelectronics research team using hafnium oxide for non-volatile embedded memory. (Read the full article here.) The results were given at a Leti memory workshop in June 2014. The team presented, “... results for a 16-kbit OxRAM test chip implemented in 28nm high-k metal gate process.” The project is under the... Read more »
  • August 8, 2014 - In RF-SOI news, Peregrine and RFMD announced that they have settled all outstanding claims between the companies (read press release here). The two companies have entered into patent cross licenses and have agreed to dismiss all related litigation. - “We are pleased that we have reached agreement with RF Micro Devices and resolved all of our outstanding litigation under terms that... Read more »
  • August 8, 2014 - Gold Standard Simulations Ltd. (GSS) announced a multimillion dollar contract to license its complete TCAD/EDA tool suite to GlobalFoundries (see press release here). The fully integrated and automated tool chain includes GARAND, the GSS ‘atomistic’ TCAD simulator; Mystic, the GSS statistical compact model extractor; and RandomSpice, the GSS statistical circuit simulator. The GSS... Read more »
  • August 8, 2014 - A new book entitled Silicon-On-Insulator (SOI) Technology, Manufacture and Applications (1st Edition) features contributions by experts at Soitec, GF, TSMC, Leti and more. - Billed as “a complete review of this rapidly growing high-speed, low-power semiconductor technology,” the book covers the entire SOI spectrum, from Moore to More than Moore. It goes into SOI wafer technology,... Read more »
  • July 18, 2014 - Soitec estimates that it has shipped enough of its eSI wafers to fabricate more than 1.4 billion RF front-end semiconductor devices. (Read the press release here.) The proprietary Enhanced Signal Integrity™ (eSI) substrates are now the substrate of choice for manufacturing cost-effective and high-performance radio-frequency (RF) devices providing a power boost for 4G /LTE... Read more »
  • July 15, 2014 - ST has posted a series of helpful website page for those new to FD-SOI – click here to see it. It starts with the basics, moves onto a discussion of how FD-SOI continues Moore's Law, and finishes with info on power efficiency, memories, analog and high-speed... Read more »
  • July 15, 2014 - An excellent article highlighting Leti's work on monolithic 3D was recently published in the IEEE's Spectrum magazine – click here to read it. In the article, Maud Vinet, manager of advanced CMOS at Leti says they've worked closely with ST to ensure manufacturability. “There is no major roadblock to the transfer of this technology to foundries,” she says in the article. “I feel... Read more »
  • June 17, 2014 - Specialty foundry TowerJazz announced the availability of an enhanced RF-SOI CMOS process design kit (PDK) for its 0.18µm process technology (see press release here). The kit was developed for use with Agilent Technologies’ Advanced Design System (ADS) software and targets a wide range of analog markets including front-end modules for mobile phones, tablets and WiFi... Read more »
  • June 17, 2014 - A ppt presentation by STMicroelectronics entitled Features and Benefits of 14nm UTBB* FD-SOI Technology is now posted on WeSRCH (click here to view it). It is fairly technical, covering process boosters, modules and innovations, mask sequences, performance and... Read more »
  • June 17, 2014 - IBM Foundry Solutions announced a new SOI-based technology for RF called 7SW SOI. The company says it is designed for 30 percent better performance than its predecessor, 7RF SOI, with which IBM shipped over seven billion chips in the last three years. The new mobile phone chip technology can help device manufacturers provide consumers with extremely fast downloads, higher quality... Read more »
  • June 8, 2014 - (Courtesy: SiTime) - SiTime, which leverages SOI for high-performance MEMS timing solutions, has introduced what it says is the smallest, lowest power 32 kHz TCXO (temperature compensated oscillator – read the press release here). With its tiny footprint and ultra-low power consumption, the SiT1552 MEMS TCXO enables a paradigm shift in the size and battery life of wearable electronics... Read more »
  • June 8, 2014 - Soitec, the world leader in SOI wafer manufacturing, has hired a former Intel exec, Thom Degnan, to take on the job of VP of the company's sales and bizdev for the Electronics Division in North America (read press release here). Soitec says that this strategic hiring supports the Electronics Division’s focus on mobile markets with FD-SOI wafers for digital electronics and RF-SOI... Read more »

Latest posts
Going Up! Monolithic 3D as an Alternative to CMOS Scaling Thumbnail

Going Up! Monolithic 3D as an Alternative to CMOS Scaling

Posted by , and on April 9, 2014
In Design & Manufacturing, R&D/Labnews
Tagged with , , , , , , , , , , , , , ,

By Jean-Eric Michallet, Hughes Metras and Perrine Batude (CEA-Leti)  The miniaturization of the MOSFET transistor has been the main booster for the semiconductor industry’s rapid growth in the last four decades. Following “Moore’s Law”, this scaling race has enabled performance increases in integrated circuits at a continuous cost reduction: today’s $200 mobile phone has as […]

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FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance Thumbnail

FD-SOI: Back to Basics for Best Cost, Energy Efficiency and Performance

Posted by and on March 26, 2014
In Design & Manufacturing, News & Viewpoints
Tagged with , , , , , , , , , ,

By Bich-Yen Nguyen and Christophe Maleville (Soitec) We are in the era of mobile computing with smart handheld devices and remote data storage “in the cloud,” with devices that are almost always on and driven by needs of high data transmission rate, instant access/connection and long battery life.  With all the ambitious requirements for better […]

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Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets Thumbnail

Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets

Posted by on March 19, 2014
In Design & Manufacturing, News & Viewpoints
Tagged with , , , , , , , , , , ,

By Handel Jones IBS has recently issued a new white paper entitled Why Migration to 20nm Bulk CMOS and 16/14nm FinFETs Is Not the Best Approach for the Semiconductor Industry.  The focus of the analysis is on technology options that can be used to give lower cost per gate and lower cost per transistor within […]

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FD-SOI Keeps Moore’s Law on Track Thumbnail

FD-SOI Keeps Moore’s Law on Track

Posted by on February 28, 2014
In Editor's Blog, News & Viewpoints
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Take a look at this graph – it’s obvious, isn’t it? FD-SOI is significantly cheaper, outdoes planar bulk and matches bulk FinFET in the performance/power ratio, and keeps the industry on track with Moore’s Law. This was part of a presentation by ST’s Joël Hartmann (EVP of Manufacturing and Process R&D, Embedded Processing Solutions) during Semi’s […]

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FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range Thumbnail

FD-SOI, Body-Biasing Shine in 10x Faster DSP With Ultra-Wide Voltage Range

Posted by on February 20, 2014
In Conferences, Design & Manufacturing, Editor's Blog, R&D/Labnews
Tagged with , , , , , , , , , , , ,

Body-biasing design techniques, uniquely available in FD-SOI, have allowed STMicroelectronics and CEA-Leti to demonstrate a DSP that runs 10x faster than anything the industry’s seen before at ultra-low voltages (read press release here). In the mobile world (not to mention the IoT), the role of DSPs is becoming ever more important. All those things you […]

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