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Industry Buzz

INDUSTRY BUZZ

  • February 8, 2016 - Professor Jean-Pierre Raskin (right) receiving the Blondel Medal for his industry-changing work on RF-SOI. Jury president Professor Pere Rocal I Cabarrocas (left) of the Ecole Polytechnique - Université Paris-Saclay presented the prize. - RF-SOI substrate guru Jean-Pierre Raskin, whose team at UCL* has driven the technology behind the most advanced wafer substrates for RF applications,... Read more »
  • February 3, 2016 - Design & Reuse, in partnership with GlobalFoundries, ST, Soitec and Leti, is sponsoring a series of FD-SOI IP Workshops around the globe. (Click here for more information.) These working days aim at sharing information about IP that’s currently available or is being designed for FD-SOI technology. - The first conference will take place during DATE in Dresden on 14 March 2016.... Read more »
  • December 23, 2015 - Mentor Graphics is collaborating with GlobalFoundries on 22nm FD-SOI to qualify the Mentor® RTL to GDS platform for the current version of GlobalFoundries 22FDX™ platform reference flow. (Read the press release here.) This includes including Mentor's RealTime Designer™ physical RTL synthesis solution and Olympus-SoC™ place & route system. In addition, Mentor and GF are... Read more »
  • December 22, 2015 - Peregrine Semiconductor’s new UltraCMOS® PE44820 is an 8-bit digital phase shifter that delivers exceptional phase accuracy and high linearity for active antenna applications. - RF-SOI pioneer Peregrine Semiconductor has introduced the UltraCMOS® PE44820, an 8-bit digital phase shifter designed for active antenna apps, covering a 358.6-degree phase range. (Read the press release... Read more »
  • December 19, 2015 - Soitec CEO Paul Boudre - VLSI Research Chip Insider has named Soitec CEO Paul Boudre to its roster of 2015 All Stars of the Semiconductor Industry. (See the announcement here.) - Boudre was cited for “...successfully re-organizing Soitec back to its core business as a leading innovative engineered substrate supplier. His first year results are already astounding, with very high growth... Read more »
  • December 17, 2015 - The IEEE S3S (SOI/3D/SubVt) has issued its call for papers for the 2016 conference (click here for details). The theme of the conference, which will take place October 10th – 13th in San Francisco, is "Energy Efficient Technology for the Internet of Things". This industry-wide event gathers together widely known experts, contributed papers and invited talks focused on SOI Technology,... Read more »
  • December 8, 2015 - Citing strong RF-SOI demand, TowerJazz has signed an agreement to purchase Maxim’s 8-inch fab in San Antonio, Texas (shown here). - With the acquisition of Maxim’s 8-inch fab in San Antonio, Texas, TowerJazz plans to quickly qualify its core specialty technologies, including its advanced Radio-Frequency Silicon-on-Insulator (RF-SOI) offering, to serve the substantial growth in... Read more »
  • December 8, 2015 - CEA-Leti announced it has developed two techniques to induce local strain in FD-SOI processes for next-generation FD-SOI circuits that will produce more speed or lower power consumption and improved performance. (For more details, read the press release here.) Targeting the 22/20nm node, the local-strain solutions are dual-strained technologies: compressive SiGe for PFETs and tensile Si... Read more »
  • November 30, 2015 - Toshiba has announced TaRF8, the next generation in the company's TarfSOI™ (aka Toshiba advanced RF SOI) process, which is optimized for RF switch apps. The first product to use the technology is Toshiba's new SP12T, enabling the lowest-class of insertion loss in the industry. Lowering insertion loss is recognized as particularly important in decreasing RF transmission power loss,... Read more »
  • November 30, 2015 - A recent NewElectronics article entitled ST’s FD-SOI transistor is set to give analogue designers a new knob to tune parameters, explores the many reasons that FD-SOI makes designers happy – even the analog folks. Editor Graham Pitcher talked to analog designer Andreia Cathelin, a senior member of STMicroelectronics’ technical staff. Among plenty of other things, she noted that... Read more »
  • November 27, 2015 - Cadence has announced that its digital and signoff tools are now enabled for the current version of the GLOBALFOUNDRIES® 22FDX™ platform reference flow (see press release here). GF has qualified these tools for the 22FDX reference flow to provide customers with the design flexibility of software-controlled body bias to manage power, performance and leakage needed to create... Read more »
  • November 27, 2015 - The 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, aka EUROSOI-ULIS 2016 will be taking place January 25-27, 2016 in Vienna, Austria. The event will be hosted by the Institute for Microelectronics, TU Wien. The focus of the sessions is on SOI technology and advanced nanoscale devices. The organizing committee invites active... Read more »
  • November 23, 2015 - Synopsys has announced a comprehensive RTL-to-GDSII solution for GlobalFoundries 22nm technology process. The implementation and signoff tools from the Synopsys Galaxy™ Design Platform have been enabled for the current version of GF's' 22FDX™ platform reference flow. GF has qualified these tools to use body bias to manage power, performance and leakage to achieve optimal energy... Read more »
  • November 23, 2015 - ATopTech, a leader in next-generation physical design solutions, has announced that their Aprisa™ and Apogee™ Place & Route tools are now enabled for the current version of the GlobalFoundries 22FDX™ platform reference flow. GF has qualified these tools for the 22FDX reference flow to provide customers with the design flexibility of using body bias to manage power, performance... Read more »
  • October 28, 2015 - Renesas Electronics will be coming out with chips built on 65nm FD-SOI technology by spring of 2016, reports EETimes Japan (see article in Japanese here, or a version translated by Google here). Although the story dates from February 2015, it has barely been covered in the English-speaking press. (FD-SOI expert Ali Khakifirooz talked about it briefly in a SemiWiki piece last month... Read more »

Latest posts
Good FD-SOI Summer Reading & Viewing Thumbnail

Good FD-SOI Summer Reading & Viewing

Posted by on September 1, 2014
In Editor's Blog
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  Over the summer, there have been a number of excellent posts on various sites related to FD-SOI, showing that interest is running ever higher. But, if you’ve been fortunate enough to have had some vacation time, you might have missed some of them, so here’s a brief listing to help you catch up. In […]

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ST’s Integrated RF-SOI for Front-End Modules: Why Designers Like It Thumbnail

ST’s Integrated RF-SOI for Front-End Modules: Why Designers Like It

Posted by on August 21, 2014
In Design & Manufacturing, News & Viewpoints
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RF-SOI is good for more than integrating RF switches.  Other key functions typically found inside RF Front-End Modules (FEM) like power amplifiers (PA), RF Energy Management, low-noise amplifiers (LNA), and passives also benefit from integration. Last year, ST announced a monolithic approach with a new RF-SOI process called H9SOI_FEM that allows the integration of all […]

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FD-SOI: The Best Enabler for Mobile Growth and Innovation Thumbnail

FD-SOI: The Best Enabler for Mobile Growth and Innovation

Posted by on August 8, 2014
In Design & Manufacturing, News & Viewpoints, SOI In Action
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The following in-depth analysis, an IBS study entitled How FD-SOI will Enable Innovation and Growth in Mobile Platform Sales, concludes that the benefits of FD-SOI are overwhelming for mobile platforms through Q4/2017 based on a number of key metrics. In fact, FD-SOI has the ability to support three technology nodes, which can mean a useful […]

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The SOI Papers at VLSI ’14 (Part 2): Thumbnail

The SOI Papers at VLSI ’14 (Part 2):

Posted by on July 17, 2014
In Conferences, Editor's Blog, Paperlinks, R&D/Labnews
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Last week we posted Part 1 of our round-up of SOI papers at the VLSI Symposia – which included the paper showing that 14nm FD-SOI should match the performance of 14nm bulk FinFETs. (If you missed Part 1, covering the three big 14nm FD-SOI and 10nm FinFET papers, click here to read it now.) This […]

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The SOI Papers at VLSI ’14 (Part 1): Breakthroughs in 14nm FD-SOI, 10nm SOI-FinFETs Thumbnail

The SOI Papers at VLSI ’14 (Part 1): Breakthroughs in 14nm FD-SOI, 10nm SOI-FinFETs

Posted by on July 11, 2014
In Conferences, Editor's Blog, Paperlinks, R&D/Labnews
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The VLSI Symposia – one on technology and one on circuits – are among the most influential in the semiconductor industry. Three hugely important papers were presented – one on 14nm FD-SOI and two on 10nm SOI FinFETs – at the most recent symposia in Honolulu (9-13 June 2014). In fact, three out of four […]

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