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Industry Buzz

INDUSTRY BUZZ

  • September 17, 2014 - Revelations by semiwiki’s Eric Esteve that TSMC has filed a significant FD-SOI patent has generated a rush of speculation in the press and online forums. In his piece When TSMC advocates FD-SOI…, Esteve noted that TSMC's patent for “Planar compatible FDSOI Design Architecture” (granted 14 May 2013) heralded the advantages as follows: “Devices formed on SOI substrates offer... Read more »
  • September 17, 2014 - RF-SOI Pioneer Peregrine has announced new switches for wireless infrastructure and carrier-grade WiFi. The UltraCMOS® PE42442 and PE42452 high-isolation, multi-throw switches address emerging requirements in wireless infrastructure equipment (read press release here). The UltraCMOS® PE42424 RF Switch enables 802.11ac Wi-Fi access points to deliver faster data rates in high-density,... Read more »
  • September 11, 2014 - In his recent piece, A couple of misconceptions about FD-SOI (3 September 2014), semiwiki blogger and IP expert Eric Esteve corrects some assertions surfacing about FD-SOI. He reminds designers that to really benefit from FD-SOI, you want to leverage body-biasing. He explains how ST has automated the IP conversion process so it takes about half the time you’d normally expect. He also... Read more »
  • September 11, 2014 - A thoroughly engaging and amusing LinkedIn Pulse piece by Bruce Kleinman comes down firmly on the side of 28nm FD-SOI. Entitled 28nm: Home Improvements (posted 13 August 2014), it’s subtitled, “Welcome to 28nm! Make yourself comfortable, we’re going to be here for awhile.” He says (among lots of other things, including astute observations about 3D), “…in my book 28nm FD-SOI... Read more »
  • September 1, 2014 - An excellent article in SST details Leti's monolithic 3D (M3D) technology, as presented at the SemiconWest 2014 Leti Day (read the full article here). Written by Brian Cronquest, MonolithIC 3D's VP Technology & IP, the piece covers a presentation given by Olivier Faynot, Leti’s Device Department Director, about “monolithic 3D technology as the 'solution for scaling'.”... Read more »
  • September 1, 2014 - Murata and Peregrine Semiconductor have entered into a definitive agreement under which Murata will acquire all outstanding shares of Peregrine not owned by Murata (read full press release here). Peregrine will become a wholly owned subsidiary of Murata and continue with its current business model of solving the world’s toughest RF challenges. Peregrine supplies many wireless markets,... Read more »
  • August 21, 2014 - imec's 28Gb/s silicon photonics platform for optical interconnects and other optical applications will be included in an upcoming multiproject wafer run, reports R. Colin Johnson in EETimes (read the article here). These runs, which are on SOI wafers, are a joint effort by ePIXfab (founded by imec and Leti), Europractice IC and MOSIS. They provide a cost-effective vehicle for fabless... Read more »
  • August 21, 2014 - Peter Clark at Electronics360 wrote about a recent presentation by an STMicroelectronics research team using hafnium oxide for non-volatile embedded memory. (Read the full article here.) The results were given at a Leti memory workshop in June 2014. The team presented, “... results for a 16-kbit OxRAM test chip implemented in 28nm high-k metal gate process.” The project is under the... Read more »
  • August 8, 2014 - In RF-SOI news, Peregrine and RFMD announced that they have settled all outstanding claims between the companies (read press release here). The two companies have entered into patent cross licenses and have agreed to dismiss all related litigation. - “We are pleased that we have reached agreement with RF Micro Devices and resolved all of our outstanding litigation under terms that... Read more »
  • August 8, 2014 - Gold Standard Simulations Ltd. (GSS) announced a multimillion dollar contract to license its complete TCAD/EDA tool suite to GlobalFoundries (see press release here). The fully integrated and automated tool chain includes GARAND, the GSS ‘atomistic’ TCAD simulator; Mystic, the GSS statistical compact model extractor; and RandomSpice, the GSS statistical circuit simulator. The GSS... Read more »
  • August 8, 2014 - A new book entitled Silicon-On-Insulator (SOI) Technology, Manufacture and Applications (1st Edition) features contributions by experts at Soitec, GF, TSMC, Leti and more. - Billed as “a complete review of this rapidly growing high-speed, low-power semiconductor technology,” the book covers the entire SOI spectrum, from Moore to More than Moore. It goes into SOI wafer technology,... Read more »
  • July 18, 2014 - Soitec estimates that it has shipped enough of its eSI wafers to fabricate more than 1.4 billion RF front-end semiconductor devices. (Read the press release here.) The proprietary Enhanced Signal Integrity™ (eSI) substrates are now the substrate of choice for manufacturing cost-effective and high-performance radio-frequency (RF) devices providing a power boost for 4G /LTE... Read more »
  • July 15, 2014 - ST has posted a series of helpful website page for those new to FD-SOI – click here to see it. It starts with the basics, moves onto a discussion of how FD-SOI continues Moore's Law, and finishes with info on power efficiency, memories, analog and high-speed... Read more »
  • July 15, 2014 - An excellent article highlighting Leti's work on monolithic 3D was recently published in the IEEE's Spectrum magazine – click here to read it. In the article, Maud Vinet, manager of advanced CMOS at Leti says they've worked closely with ST to ensure manufacturability. “There is no major roadblock to the transfer of this technology to foundries,” she says in the article. “I feel... Read more »
  • June 17, 2014 - Specialty foundry TowerJazz announced the availability of an enhanced RF-SOI CMOS process design kit (PDK) for its 0.18µm process technology (see press release here). The kit was developed for use with Agilent Technologies’ Advanced Design System (ADS) software and targets a wide range of analog markets including front-end modules for mobile phones, tablets and WiFi... Read more »

Latest posts

More than 65% Smartphone RF Switches on SOI, Says Yole; Power Amps Next

Posted by on July 19, 2013
In Editor's Blog
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The industry research firm Yole Développement says that more than 65 percent of substrates used in fabricating switches for handsets are SOI-based. This is a high-growth part of the market, putting up double-digit increases. Like a standard SOI wafer, an RF SOI substrate has an active (“top”) layer on which CMOS transistors are built, with […]

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Ready for FD-SOI, Says World’s Largest Silicon Wafer Company Thumbnail

Ready for FD-SOI, Says World’s Largest Silicon Wafer Company

Posted by on July 11, 2013
In Editor's Blog
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The world’s largest maker of silicon wafers, Shin‐Etsu Handotai (SEH) says it’s meeting the specs for FD-SOI wafers, and can quickly expand capacity to meet rising demand. This message was delivered by Nobuhiko Noto of SEH during his presentation at the recent FD-SOI Workshop in Kyoto, Japan. SEH, a $12.7 billion company supplying over 20% […]

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GlobalFoundries On Cost vs. Performance for FD-SOI, Bulk and FinFET Thumbnail

GlobalFoundries On Cost vs. Performance for FD-SOI, Bulk and FinFET

Posted by on July 3, 2013
In Editor's Blog
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According to Shigeru Shimauchi, Country Manager, GlobalFoundries Japan, for the same level of performance, the die cost for 28nm FD-SOI will be substantially less than for 28nm bulk HPP (“high performance-plus”). Specifically, to get a 30%  increase in performance over 28nm bulk LPS PolySiON, HPP increases die cost by 30%, while FD-SOI only increases die […]

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Which will hit the 14nm jackpot first: FD-SOI or FinFET? Gauntlet down. Race on. Thumbnail

Which will hit the 14nm jackpot first: FD-SOI or FinFET? Gauntlet down. Race on.

Posted by on June 21, 2013
In Editor's Blog
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STMicroelectronics CTO Jean-Marc Chery threw down the gauntlet when he told Electronics Weekly, “We must be ready with 14nm FD-SOI before anyone has FinFET at 14nm.” Can they do it? Yes, they can. Unlike FinFETs, Planar FD-SOI is not a disruptive technology – FD-SOI is an extension of the planar CMOS we all know and […]

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Fully-Depleted SOI (and more) at VLSI (Kyoto): some knock-your-socks-off papers Thumbnail

Fully-Depleted SOI (and more) at VLSI (Kyoto): some knock-your-socks-off papers

Posted by on June 12, 2013
In Advanced Substrate Corners, Conferences, Editor's Blog, Paperlinks
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Look for some breakthrough FD-SOI and other excellent SOI-based papers coming out of the 2013 Symposia on VLSI Technology and Circuits in Kyoto (June 10-14). By way of explanation, VSLI comprises two symposia: one on Technology; one on Circuits. However, papers that are relevant to both are presented in “Jumbo Joint Focus” sessions. Here’s a […]

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