Industry Buzz

Wondering what’s new, what’s hot and what’s next in the SOI and advanced substrate world?  Check
out our Industry Buzz – now featuring regular updates.

The Heterogeneous Technology Alliance (HTA), a coalition of top European R&D organizations, is offering an SOI-MEMS platform. Looking to bridge the gap between academia and industry, this technological platform pools the SOI-MEMS expertise, capabilities and fabrication facilities of Leti (France), Fraunhofer (Germany), CSEM (Switzerland) and VTT (Finland).

The main focus of HTA (click here for the website) is the further development of innovative Smart Systems. SOI-MEMS is typically used for silicon oscillators, microphones, speakers, compass, navigation, motion sensors, sensors and actuators, energy harvesting, micro fuel cells, microfluidics and other deep reactive-ion etched micro structures. A recently issued brochure gives an overview of the offering.

The HTA is active at all levels of Smart Integrated Systems Solutions: from applied research on materials, processes and equipment through the fabrication of devices and components to the development of new products and services. Development and small-scale production cleanrooms for micro-electronics, MEMS, power electronics and analogue components is available. Wafer handling capacity encompasses wafer sizes ranging from 100, through 150 and 200 to 300 mm.

A one-stop shop for complete system solutions, the HTA guarantees simple access to an enlarged portfolio of technologies and is structured to facilitate technology transfer to European and non-European companies. In addition to working with large industrial partners, the HTA offers services specially suited for small and medium-sized companies. With a combined staff of more than 5,000 scientists and a portfolio of more than 3,000 patents, the HTA is de facto the largest European organization in the field.


Posted March 27, 2015   -   Share this Buzz
Peregrine Semiconductor teams with Murata to announce the 2015 UltraCMOS® Global 1 Initiative. This new initiative seamlessly integrates the PE56500 all-CMOS RF-SOI front-end solution and Murata filters.

Peregrine Semiconductor teams with Murata to announce the 2015 UltraCMOS® Global 1 Initiative. This new initiative seamlessly integrates the PE56500 all-CMOS RF-SOI front-end solution and Murata filters.

Peregrine Semiconductor and Murata have launched the 2015 UltraCMOS® Global 1 Initiative, which includes the UltraCMOS Global 1 PE56500 and seamlessly integrates Murata filters and packaging into the RF-SOI front-end solution. (See press release here.) Built on Peregrine’s UltraCMOS 10 technology, the PE56500 combines Peregrine’s proven RF-SOI switch and tuner technology with new CMOS PA capability that delivers raw performance equivalent to GaAs. UltraCMOS Global 1 technology makes a single, global SKU possible – saving 4G LTE mobile-device manufacturers significant time and money.

Global 1 replaces discrete duplexer matching with a sophisticated tunable matching network that optimizes the PA match across the band. With Global 1 and its supporting software, an engineer can simply plug in the device and use the software to tune the RF front end within a few hours, rather than spend weeks in manual tuning.

The Global 1 PE56500 will be in volume production in late 2015.

Posted March 27, 2015   -   Share this Buzz

Cryptocurrency mining hardware company SFARDS is preparing to release its debut miner, which is built on a 28nm FD-SOI ASIC, by April 2015. (You can read the announcement here.)

At the time of this post, tape out of the company’s SF3301ASIC has been announced as complete. Cryptocurrency (the best-known example of which is Bitcoin) depends on “ledgers” supported by bitcoin “mining” chips.  As noted in an arstechnica piece (read it here), while some Bitcoin mining is done on CPUs and GPUs, serious mining requires much faster and lower power ASICs in the hardware.

As posted on the SFARD blog, “By using FDSOI technology not currently present in any other chip on the market, power efficiency when mining with SHA-256 is predicted to reach below the 0.3 J/GH range, and 2.0 J/MH when mining with Scrypt.

“The SF3301 is extremely versatile, allowing you to mine multiple currencies with one device. This means price fluctuations can be harnessed and being forced to turn off your miner is far less likely.

“A condition can arise where altcoins are utilized to cover electricity costs while bitcoin is continuously and simultaneously being mined. This ability is something never seen before with 28nm technology.”

Posted March 11, 2015   -   Share this Buzz

XfabWebinarX-FAB is running a series of webinars on very high-temperature design the 18th and 19th of March 2015. A pure-play analog/mixed-signal and specialty foundry, X-FAB’s broad portfolio includes SOI CMOS processes for use at high temperatures up to 225°C. The event is free, but space is limited, so sign up here.

As noted in the program announcement, an increasing number of applications such as automotive engine management require electronic systems that operate reliably at temperatures above 150°C. Designers are facing the challenges of dealing with changes in electrical characteristics, higher leakage current and thermally accelerated degradation.  (To read more about high-temp apps on SOI, click here.)

This webinar looks at the device physics, electrical properties of MOSFETs and NVMs, and degradation mechanisms at elevated temperatures up to 200°C. It will discuss the behavior of CMOS when it is operated at higher temperatures and how the issues that arise can be mitigated by process architecture and design techniques.

Posted March 11, 2015   -   Share this Buzz

With a special blog and video invitation, Samsung pulled out the stops to help get the word out about the recent FD-SOI workshop in San Francisco. Kelvin Low, Sr. Director Foundry Marketing, Samsung SSI, posted Design Faster, Cooler, Smaller Chips with Samsung Foundry’s 28nm FD-SOI Process Technology (read it here). Embedded in the blog is a YouTube video encouraging people to attend the SF event and learn more. ASN recently covered Kelvin’s excellent workshop presentation – you can read that here if you missed it.

Posted March 5, 2015   -   Share this Buzz

SemiWiki founder Dan Nenni notes that their 41 FD-SOI related posts to date have drawn over 200,000 views (you can read his whole post about it here). Of that, he notes, over 60,000 came to the site directly via a search for the keyword FD-SOI. “So, if there is a question in your mind as to when FD-SOI will come to the mainstream semiconductor market the answer is very soon, absolutely,” he concludes.

Posted March 5, 2015   -   Share this Buzz

Freescale is designing its next generation microprocessor, the iMX7, on 28nm FD-SOI, EETimes has just revealed. This was in an article by Chief International Correspondent Junko Yoshida entitled Freescale, Cisco, Ciena Give Nod to FD-SOI (read it here). Freescale microcontroller SVP & GM Geoff Lees told EETimes the chip’s designed for “’secure’ IoT applications, including automotive (telematics, V2V, entry-level infotainment) and smart devices (healthcare, home appliances and factory automation)”. Samsung’s being tapped as the foundry. Cisco and Ciena are also using FD-SOI, the article stated.

Posted March 3, 2015   -   Share this Buzz

GreenChip_byNXP_identifier_cmykNXP recently expanded its GreenChip line of SOI-based power supply controller ICs with the new TEA1832TS (click here for more product info). Here at ASN, we first covered this line back in 2011 (see that Buzz here), and NXP’s been adding to it ever since.

Smart, green power supplies are one of the most important ways that designers reduce the power consumption of modern electronics. The reason NXP has been using SOI for over 15 years is well explained in this ASN piece from 2009 – read it here.

The TEA1832TS is a low-cost Switched Mode Power Supply (SMPS) controller IC intended for flyback topologies. It makes the design of low-cost, highly efficient and reliable supplies easier by requiring a minimum number of external components. The device is especially suited for medium power applications.

Posted March 3, 2015   -   Share this Buzz

SureCore’s ultra-low power SRAM technology on 28nm FD-SOI saves 70% in read/write power and reduces leakage by 30% compared to 40nm bulk implementations, writes SemiconductorEngineering Editor-In-Chief Ed Sperling (read the article here). Hitting the sweet spot for mobile, IoT and wearables, SureCore recently raised $1.6 million in funding.

Posted February 23, 2015   -   Share this Buzz

SiTime’s SOI-MEMS solution is a key part of a new realtime health and fitness tracking solution from MegaChips called “frizz”. MegaChips has announced a partnership with Bosch Sensortec to provide a complete reference design for use of frizz in smartphones, wearables and other personal devices allowing consumers to monitor their activities in real time (read the press release here).

This marks SiTime’s first major announcement since becoming a subsidiary of Mega chips. SiTime leverages SOI-MEMS for high-performance, ultra-low power, ultra-slim timing solutions. (SiTime contributed an excellent piece to ASN a few years ago explaining their SOI edge – you can still read it here.)

SiTimeShignonB_image01Piyush Sevalia, SiTime marketing EVP, said, “SiTime’s groundbreaking MEMS and programmable analog technologies allow us to deliver game-changing MEMS timing solutions. Our MHz and kHz solutions provide the best accuracy, the smallest size and the lowest power, all of which are ideally suited for wearable electronics and internet of things (IoT).”

Frizz is a motion sensor hub with a 32bit DSP based motion engine that can realize high performance calculations used in processing algorithms with ultra-low power consumption in lieu of a microprocessor. MegaChips’ ultra-low power frizz, combined with the SiTime SiT1602 programmable MHz oscillator and Bosch Sensortec MEMS sensors provide more meaningful data, easy interpretation, higher accuracy and ultra-low power critical for longer battery life.

The joint frizz and Bosch Sensortec solution is available now from MegaChips (extensive information is available here).

Posted February 23, 2015   -   Share this Buzz

A recent post by Eric Esteve on SemiWiki, entitled Sony Endorses FD-SOI to Attack Wearable & IoT (click here to read it) delves into some of the technical and design details of Sony’s Tokyo presentation on a 1mW 28nm FD-SOI GPS. (The full presentation is available here. Or click here to read the ASN overview of all the Tokyo presentations.) For the design community, IP expert Esteve talks about how Sony dramatically lowered the supply voltage, and looks at active power consumption, leakage, intrinsic gain and noise. He concludes, “FD-SOI penetration in consumer applications has started.”

Posted February 17, 2015   -   Share this Buzz

ARM is working on FD-SOI libraries, and the ecosystem is now there, says David Manners of Electronics Weekly. In two separate pieces, he cited conversations with ARM EVP Pete Hutton. In Microcontrollers Become Major at ARM (click here to read it), Hutton confirmed both the FD-SOI libraries and customers. In Cinderella (click here to read it), Manners looked at all the FD-SOI pieces – the recent Sony GPS presentation, involvement of players such as ARM, Samsung, Verisilicon, Open Silicon, Synopsys and Cadence – and concluded that, “Cinderella is finally going to the ball.”

Posted February 17, 2015   -   Share this Buzz

SemiWiki blogger Paul McLellan has posted another excellent FD-SOI piece, this time covering Samsung’s presentation at the recent FD-SOI/RF-SOI Workshop in Tokyo (click here to read it). Within 24 hours of posting, it had already been shared over 60 times on LinkedIn. As always, McLellan puts the presentation in perspective for the design community, calling out key highlights.

Posted February 9, 2015   -   Share this Buzz

(Courtesy: ST, designreuse)

A video made during ST’s FD-SOI presentation at IP-SoC 2014 has now been posted by designreuse on YouTube (you can see it here). Over 40 minutes long, it details the European THINGS2DO project, which includes almost 50 partners working on the FD-SOI ecosystem. (This follows onto the PLACES2BE project, which is finishing up this year.) It underscores the point that the markets for this ecosystem are very fragmented, so it’s critical that such an undertaking be as broad as possible.

Posted February 9, 2015   -   Share this Buzz

In a SemiEngineering piece entitled FD-SOI meets the IoT, Executive Editor Ann Steffora Mutschler talked to a couple of design houses working on FD-SOI IoT projects. Synapse Design has taped out multiple chips, and has more projects underway, they told her, with reports of impressive power savings. In close collaboration with a foundry, OpenSilicon is working on an FD-SOI test chip that should tape out soon. STMicroelectronics indicates that silicon-proven IP is now available through a reseller/IP vendor, and that digital-analog integration benefits are especially compelling. Mutschler also talked to Sonics, Semico, and the big EDA players. (Click here to read the article.)

Posted February 8, 2015   -   Share this Buzz