Industry Buzz

Wondering what’s new, what’s hot and what’s next in the SOI and advanced substrate world?  Check
out our Industry Buzz – now featuring regular updates.


Leti's M3D technology is now called "CoolCube". (Courtesy: Leti, IEDM 2014)

Leti’s M3D technology is now called “CoolCube”. (Courtesy: Leti, IEDM 2014)

Leti’s monolithic 3D technology, which has now been dubbed “CoolCube”, was featured in a recent EETimes piece.  Entitled True 3D monolithic integration eliminates TSV dependence (click here to read it), the article covers a Leti paper presented during a 3D-VLSI workshop preceding IEDM ’14.  Leti’s Advanced CMOS lab manager Maud Vinet detailed the “cool” process in an FPGA, stacking a 14nm FD-SOI logic layer on top of a memory layer. It eliminates the need for TSVs, shrinks area by 55%, cut power in half and increases speed by 30%, effectively gaining a full node in terms of power and performance.

Posted January 22, 2015   -   Share this Buzz
Paul Boudre has been named CEO of Soitec.

Paul Boudre has been named CEO of Soitec.

Paul Boudre has been named CEO of SOI wafer leader, Soitec (see financial press release here).  The company also announced its plans to re-focus on its core electronics business unit.

Q3 sales were 48 million euros, up 45% over last year. The sale of 200mm wafers (which are used in chips for RF-SOI and smartpower) were almost doubled from last year, and now represent three quarters of the company’s wafer sales.  300mm wafers (which are used for partially and fully-depleted SOI logic) were up by 16%.  The company expects to see the ramp for 300mm FD-SOI wafers in H2 2015.

Boudre joined Soitec from KLA-Tencor in 2007. He has served as the company’s COO since 2008.   He now takes over the CEO role from the company’s founder, André-Jacques Auberton-Hervé, who will continue as Chairman of the Board.

Soitec is restructuring its solar business and implementing cost-cutting measures.

Posted January 22, 2015   -   Share this Buzz

CMCMicro_28nmFDSOIA new interactive WebEx webinar on FD-SOI design sponsored by CMC Microsystems has been posted. Entitled Design and Characterization of Circuits and Devices in the ST 28nm Fully-Depleted Silicon-On-Insulator (FD SOI) (click here to view it), it features two presentations by University of Toronto professors based on their recent experiences with circuit design in the ST’s 28nm FDSOI CMOS technology. The webinar provides insights about circuit design, the technology’s unique features and capabilities, test devices measurement results relative to other technologies, and explores how this technology can be used in mm-wave, high-speed digital and silicon photonics applications.

Two mixed-signal transceivers implemented in ST’s 28nm FDSOI CMOS technology targeting these applications are summarized.  First, a low-power small-area transceiver compatible with the dense packaging technologies, such as silicon interposers, and operating up to 30Gb/s is presented.  Second, a 20Gb/s wireline receiver including a decision feedback equalizer (DFE) with digital adaptation logic and a digital CDR are required. Both designs include both high-speed analog blocks and synthesized digital logic using the technology’s standard cell libraries.

The webinar lasts about an hour all told, with 5-minute Q&A sessions following each presentation.  In the first minute or so there are a few technical snafus, but those are quickly resolved, so be patient: it’s worth the wait.

Posted January 12, 2015   -   Share this Buzz
New record solar cell on a 100 mm wafer yielding approximately 500 concentrator solar cell devices.( ©Fraunhofer ISE/Photo Alexander Wekkeli)

New record solar cell on a 100 mm wafer yielding approximately 500 concentrator solar cell devices. (©Fraunhofer ISE/Photo Alexander Wekkeli)

A new world record of 46% for the direct conversion of sunlight into electricity was recently established by Soitec, Leti and the Fraunhofer Institute for Solar Energy Systems ISE (read the press release here). Multi-junction cells are used in concentrator photovoltaic (CPV) systems to produce low-cost electricity in photovoltaic power plants, in regions with a large amount of direct solar radiation.

Multi-junction solar cells are based on a selection of III-V compound semiconductor materials. The world record cell is a four-junction cell, and each of its sub-cells converts precisely one quarter of the incoming photons in the wavelength range between 300 and 1750 nm into electricity. When applied in concentrator PV, a very small cell is used with a Fresnel lens, which concentrates the sunlight onto the cell. The new record 46.0% efficiency was measured at a concentration of 508 suns and has been confirmed by the Japanese AIST.

Jocelyne Wasselin, Vice President Solar Cell Product Development for Soitec, predicts that they’ll reach the holy grail of 50% efficiency in the near future.

Posted January 12, 2015   -   Share this Buzz

The IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S) has issued the 2015 Call for Papers.

Now in its 3rd year as a combined event, the 2015 IEEE S3S Conference will take place in Sonoma Valley, CA, just north of San Francisco, October 5-8. This industry-wide event will gather together widely known experts, contributed papers and invited talks on three main topics: SOI technology, subthreshold architectures with associated designs and 3D integration. With its 40-year history, the SOI segment continues as world’s premier conference to present and discuss state of the art SOI technical papers.

The 2014 edition was a great success (click here to read about it).  The deadline for submissions for the 2015 conference is April 15, 2015 (click here for complete submission information).

Posted January 9, 2015   -   Share this Buzz

There’s been a significant uptick in patents related to fully-depleted SOI, according to a new report by KnowMade (click here to get the report brochure).  The report looks at both FD-SOI and SOI-FinFETs (both of which are fully depleted technologies).  More than 740 patent families have been published to date, of which planar FD-SOI accounts for 340 families.  Following a rush of activity about 10 years ago there was a dip, but activity over the last couple of years has once again been very strong.

The report provides a comprehensive overview, essential patent data for fully depleted SOI, plus a searchable database with links.  It identifies more than 30 patent holders of FD-SOI related intellectual property, providing in-depth analysis of key technology segments and key players. “The major proponents of the FD-SOI technology have strong IP arms, but other unexpected players known as not supporting FDSOI [including TSMC and Intel] are also present,” notes the report.

Posted January 9, 2015   -   Share this Buzz

SOI wafer and advanced substrate leader Soitec and Korea’s SK Innovation (SKI) recently signed a Collaboration Agreement (CA) to establish a strategic alliance (read the press release here). The focus is on accelerating innovation in the area of semiconductor materials for information communication technologies and internet-of-things applications.

The collaborative partnership will build on the synergy between the companies. SKI is known as the leader of Korea’s energy industry, with over five decades in the fields of energy, lubricants, petrochemicals, organic materials, information electronic materials, and lithium-ion batteries.

At the outset, the alliance will focus on innovating engineered substrates and the processes for fabricating these materials. However, it could be extended to include manufacturing and commercial development. The partners’ joint goal is to bring the first products to market by early 2017 in applications. These breakthrough products will allow Soitec to grow its global market presence.

“Our partnership gives SK Innovation and Soitec the power to develop new materials and very quickly bring innovations to market,” said Carlos Mazure, Soitec’s chief technical officer. “This is a very important first step for Soitec as we team up with Korea’s leader in energy and materials development to leverage our two companies’ strong synergies.”

Posted January 7, 2015   -   Share this Buzz

Samsung’s “28FDSOI comes with a complete design ecosystem (PDK, Library, IP, and DFM),” says Kelvin Low in a blog entitled, “2014, What a Year It’s Been for Samsung Foundry. (Click here to read it.) Kelvin’s Senior Director, Foundry Marketing at Samsung Semiconductor, Inc. Samsung licensed the process technology from ST in May 2014. “Customers who are looking to manufacture faster, cooler, and simpler devices at 28nm should look no further – 28FDSOI is the ideal choice,” he concludes.

Posted January 7, 2015   -   Share this Buzz

Under a new agreement, Simgui now has the exclusive right to promote, distribute and sell Soitec’s 200-mm SOI wafers in China (see press release in English here; Chinese version here). Soitec is the world’s leading producer of SOI wafers. Shanghai Simgui Technology Co., Ltd. (Simgui), a Shanghai-based semiconductor materials company, is a spinoff of the Shanghai Institute of Microsystem and Information Technology (SIMIT/CAS).

Available in different product families, the 200mm SOI wafers are used in chips such as RF ICs broadly used in smartphones and power ICs for automotive applications. This agreement, which follows a previous licensing and manufacturing partnership between the two companies, represents another key step in establishing a Chinese SOI ecosystem while also strengthening Soitec’s presence in this double-digit-growth semiconductor market.

Posted December 9, 2014   -   Share this Buzz
The Orion Lightspeed™ inspection system by Altatech (a division of Soitec) pinpoints the true size and location of nano-scale defects inside compound semiconductor materials and transparent substrates

The Orion Lightspeed™ inspection system by Altatech (a division of Soitec) pinpoints the true size and location of nano-scale defects inside compound semiconductor materials and transparent substrates

Two new products from semi equipment manufacturer Altatech: one for ultra-thin film deposition, and one for searching out nano-defects. Altatech is a division of Soitec, best known in the advanced substrates community for its leadership in SOI wafers. This part of the company, however, develops highly efficient, cost-effective inspection and chemical vapor deposition (CVD) technologies used for R&D and manufacturing of semiconductors, LEDs, MEMS and photovoltaic devices.

The company’s newest inspection system, the Orion Lightspeed™, is capable of pinpointing the size and location of nano-scale defects inside compound semiconductor materials and transparent substrates (see press release here). The new system helps to ensure the quality control of high-value engineered substrates used in several fast growing markets including high-brightness LEDs, power semiconductors and 3D ICs. Inspection is based on Altatech’s patented synchronous Doppler detection™ technology, which determines the exact size and position of defects by making direct physical measurements with resolution below 100 nm. This provides true defect sizing, as opposed to other types of inspection equipment on the market that make indirect measurements using diffracted light to calculate approximate defect sizes. It handles 200mm or 300mm substrates, with throughput of 85 and 80 wafers per hour, respectively. Beta systems have already been installed at customers’ facilities and are demonstrating excellent performance. Shipments of production units are scheduled to begin in April 2015.

The new AltaCVD 3D Memory Cell™ is the latest member of Altatech’s AltaCVD line, designed to deposit ultra-thin semiconductor films that enable the manufacturing of high-density, low-power memory ICs used throughout mobile electronics (see press release here). The new system performs atomic-layer deposition 10 times faster than conventional atomic-layer deposition (ALD) systems, helping to meet global market demands for both high-volume production and cost efficiency in fabricating advanced memories. The system is currently demonstrating its unique capabilities and performance at one of Altatech’s key customers. Production units are available.

Posted December 8, 2014   -   Share this Buzz

SOI-MEMS timing device leader SiTime Corporation is being acquired by MegaChips Corporation, a top 25 fabless semiconductor company based in Japan for $200 million in cash. (read the press release here). This transaction combines two complementary fabless semiconductor leaders that provide solutions for the growing Wearables, Mobile and Internet of Things markets.

“MEMS components are fuelling the growth of the semiconductor industry, “said Akira Takata, President and CEO of MegaChips Corporation.  “Through the acquisition of SiTime, MegaChips becomes a leader in MEMS. SiTime will help us expand our portfolio and diversify our customer base.  SiTime technology is the perfect match for MegaChips’ solutions that target Wearables, Mobile and IoT markets.”

SiTime’s innovative SOI-MEMS timing solutions replace dated quartz products in the telecom, networking, computing, storage and consumer markets, with the benefits of higher performance, smaller size, and lower power and cost.  ASN has been following SiTime for over five years, since they first spun off of Bosch, and CTO Markus Lutz explained the role SOI plays in their technology (which you can read here). You can also read more about SiTime products and technology here by clicking the ASN SiTime tag.

SiTime will retain its name and operate as a wholly owned subsidiary of MegaChips.

 

Posted November 3, 2014   -   Share this Buzz

Soitec, a leader in SOI wafers and other advanced substrates, recently announced the sale of its gallium arsenide (GaAs) epitaxy business (the Soitec Specialty Electronics subsidiary) to Intelligent Epitaxy Technology Inc (see press release here).  The deal follows the previous collaboration between Soitec and IntelliEPI (see press release dated December 12, 2013).

“The sale of our gallium arsenide (GaAs) epitaxy business to IntelliEPI reflects our drive to refocus Soitec’s electronics division on its key products under its five-year Soitec 2015 program,” explained Bernard Aspar, Senior Vice President and Soitec’s Communication & Power Business Unit General Manager.

“The transaction will enable IntelliEPI to widen its customer base and penetrate to several critical GaAs application markets such as automotive radar technology. It will also enable IntelliEPI to provide best-valued products and services to all its customers with expanded manufacturing capacities from its Texas, USA location,” said Yung-Chung Kao, IntelliEPI President and CEO.

 

Posted November 3, 2014   -   Share this Buzz

 

Peregrine Semi's new RF-SOI based UltraCMOS® PE42722 high-linearity RF switch allows customer premises equipment (CPE) vendors to future proof their devices to meet the strict linearity requirements of the DOCSIS 3.1 Cable Industry Standard (Courtesy: Peregrine Semi)

Peregrine Semi’s new RF-SOI based UltraCMOS® PE42722 high-linearity RF switch allows customer premises equipment (CPE) vendors to future proof their devices to meet the strict linearity requirements of the DOCSIS 3.1 Cable Industry Standard (Courtesy: Peregrine Semi)

Peregrine Semi senior marketing manager Kinana Hussain says the company’s new RF-SOI PE42722 switch “…is a game changer for the cable industry,” (see press release here). The UltraCMOS® PE42722 is a high-linearity RF switch that enables a dual upstream/downstream band architecture in cable customer premises equipment (CPE) devices. “By enabling a dual-band architecture, customers will be able to make a simple phone call to their cable service provider, who can then, ‘with the flip of a switch’, upgrade their customer’s high-speed data service plan. The added bonus of also complying with the DOCSIS 3.1 standard makes this switch a must-have for all next-generation CPE devices,” he concludes.

Posted October 27, 2014   -   Share this Buzz

In a piece entitled Time To Look At SOI Again (you can read it here), SemiconductorEngineering Executive Editor Mark Lapedus charts the industry’s accelerating interest in SOI, including FD-SOI and FinFETs on SOI.

He notes that FD-SOI is now planned for four generations: 28nm, 20nm, 14nm and 10nm. The offering has expanded beyond ST to Samsung and GF. He quotes GF’s Mike Mendicino as saying, “We’re seeing a lot of interest from customers (for FDSOI).”

For FinFETs, he quotes Terry Hook’s IBM presentation at the recent IEEE S3S Conference, when he said that on SOI, “…the formation of the fin is blindingly simple”.  (If you missed Terry’s ASN piece last year, you can read it here.)

Posted October 27, 2014   -   Share this Buzz

In a blog entitled “FD-SOI Will Be Mainstream” (8 October 2014 – read it here),  ElectronicsWeekly’s David Manners reports that the CEO of Synapse Design predicts FD-SOI will be a mainstream technology.

Synapse has been working in FD-SOI since 2011, has already taped out three designs and has more in the pipeline, the CEO told Manners. He sees a lot of activity coming from Japan and China in automotive and mobile as well as in network infrastructure.

Posted October 17, 2014   -   Share this Buzz