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SPECIAL SUPPLEMENT: SOI Industry Consortium*

SOI & the greening
of electronics

By André-Jacques Auberton-Hervé,
Chair,
SOI Industry Consortium

The SOI Industry Consortium has a major role to play promoting the power-saving benefits of SOI.

The SOI Industry Consortium has now launched the “SOI: Simply Greener” campaign.  Over the next few months, we’ll be reaching out to the industry and the press with this message.  But for our members, “green” is much more than a slogan:  it’s embedded in their core values.

Last year’s joint survey with the GSA, the “SOI technology: Semiconductor perception & awareness study”, indicated that almost half of the design community sees power savings as the single most important advantage of using SOI.

Acting on that information, the Consortium members have been working to ensure that all the pieces are in place – particularly physical IP and libraries – so that designers can leverage SOI in the greening of electronics

Shifting drivers

Increasing performance has been the traditional industry driver.  Now, however, the quest for energy efficiency has come to the forefront.  It’s no longer a question of increasing performance at the expense of ratcheting up the power envelope.

High-performance enterprise processors traditionally used a lot of power – so it was natural enough for this to be one of the first places we saw SOI gain traction.  Faced with burgeoning electricity bills – not just for the systems but also for the infrastructure to keep them cool and running – IT managers were among the first to boost the volumes of energy-saving, SOI-enabled systems.

Now the consumer market is beginning to understand that operating costs are just as important a consideration as the price tag.  Here again, the high-performance gaming systems were the first to adopt SOI-based solutions.  While it might not seem like such a big deal to lower power consumption in video games, when multiplied by the incredible volumes of the consumer market, the power savings quickly add up on a global scale.

With the advent of ubiquitous computing, with more and more chips embedded in more and more products, comes the imperative – both moral and financial – of controlling chip power consumption. 

Chip designers know well the high toll exacted by the performance-power trade-off.  70% of the GSA/Consortium survey respondents said that a 30% power savings would motivate them to invest in an evaluation of SOI. 

SOI can save that 30% and still enable increased performance. For those looking to make a bigger dent in their power budget, SOI can enable even greater savings in power at a constant performance level. These are powerful, green, motivating figures, particularly when put in the high-volume context of consumer markets.

Green design, green manufacturing

The intertwining of economic and environmental responsibility is really what “green” is all about.  
Designers who choose SOI to simplify and win the power reduction challenge should know that their choice is also “green” from a manufacturing standpoint.

Manufacturing chips on SOI decreases the number of overall process steps compared to chips built on bulk silicon. It also enables increased density, which decreases real estate. Yields are also typically higher. Taken together, these savings cut the carbon footprint down every step of the way:  less consumables, less energy, less waste. 

In calculating green impact and costs, SOI-enabled chips are a clear winner on the road to sustainability. In aggregating our expertise for the greening of electronics, the SOI Industry Consortium is playing a major part in this world-changing movement.

What’s new

SOI: Simply Greener — The Campaign

This summer, the SOI Industry Consortium launched the “SOI Simply Greener” initiative, encouraging the electronics industry to adopt a broader application of SOI’s energy saving benefits. 

Results from two studies offered by consortium members demonstrate both increased performance and reduced power consumption – the magnitude of the benefit applied to each is the designer’s choice.

• A benchmark analysis was performed by ARM Holdings using a 24-stage interconnect-loaded datapath circuit.  When comparing IBM’s 45nm bulk high performance and 45nm SOI technologies, the SOI implementation resulted in a 25% circuit area reduction, 66% reduction in static power leakage and nearly 22% reduction in dynamic power with 5% higher performance.
• A consumer product chip design that was migrated from 65nm bulk high performance to IBM’s 45nm SOI technology realized a 50% increase in operating frequency, more than 64% reduction in die area and a 38% reduction in power.

Whether designers put the emphasis on increasing or maintaining performance, significant power savings (as well as area savings) were realized with a move to SOI.

Get the Logo

The Consortium’s SOI: Simply Greener logo is freely available on the website. Members and supporters are encouraged to download it for use in their own presentations.

Industry Support

In support of the press announcement launching the initiative, the Consortium offered citations from industry leaders. A few follow here – you can read all of them on the SOI Consortium website.

“As we detailed in our recent report Semiconductor Technologies: The Potential to Revolutionize U.S. Energy Productivity, semiconductors already are the leading factor behind energy efficiency gains. SOI offers a major advance in the power efficiency of electronics, and with appropriate public policy, investment and usage these semiconductor technology gains can contribute to cumulative net electricity bill savings of $800 billion through 2030 for consumers and businesses in the United States alone, as well as creating an average of 500,000 new jobs per year and reducing energy-related CO₂ emissions by more than 400 million metric tons annually over the period 2010 through 2030.”

John A. “Skip” Laitner, lead report author and Director, Economic and Social Analysis, American  Council for an Energy-Efficient Economy (ACEEE)

 

“UMC has been incorporating the benefits of SOI technology across multiple semiconductor applications such as MEMS, photonics, and our 65nm high-speed process portfolio. The energy efficiency of SOI adds to the attractiveness of the technology and conforms with UMC’s green initiative to provide environmentally friendly processes for our customers. We look forward to further developing SOI to provide customers with solutions that enable more innovative applications for a better and greener planet.”

W.Y. Chen, Senior Vice President, UMC

 

“The ‘SOI: Simply Greener’ initiative expresses the motivation and values that connect members of the SOI Consortium and foster collaboration around this energy-efficient technology. We welcome like-minded companies to join us in this meaningful work, to bring needed improvements to our industry and quality of life. The ecosystem is ready and accessible, and there is a broad space of opportunities for innovation in all areas: process; planar and 3D device architecture and optimization; digital, analog, RF, and MEMS design; EDA; IP development and optimization; heterogeneous planar and 3D integration; and services.”

Horacio Mendez, Executive Director, SOI Consortium.

 

"As a leader in low power design, Cadence continues to invest heavily in new technologies and methodologies to provide maximum power efficiency, now a key consideration for all designs. We are pleased to announce our end-to-end support for the SOI process within the Cadence Low Power Design Solution, thereby offering customers an integrated and low-risk path to maximizing the potential SOI benefits on their green designs."

Dr. Chi-Ping Hsu, Senior Vice President, R&D Implementation Group, Cadence

 

New Members

The SOI Industry Consortium is open to any company, organization or academic institution with an interest in SOI.

See the website for information on how to join: www.soiconsortium.org

Now joining the membership roster are:

 

 

 

* Legal Note: The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions.

 

 

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