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SPECIAL SUPPLEMENT: SOI INDUSTRY CONSORTIUM*

Getting the Word Out

By Horacio Mendez,

Executive Director,

SOI Industry Consortium

 

 

 

The consortium’s director reports on recent events, activities and accomplishments.

These last few months the SOI Industry Consortium has raised its profile, and undertaken strategic steps in getting the word out on SOI.

The joint survey with the GSA is very successful (see the cover of this issue of ASN for details). It shows we’re on the right track targeting the low-power concerns of the mainstream industry. The pdf is freely available from our website and the GSA. Visitors to the site can pull from it for presentations and share it with colleagues.

We’ve had our booth at key user events and conferences including TSMC’s Technology Symposiums, ConFab and DAC. Semicon West and a member partner meeting are next. This gives us a chance to meet directly with companies that may be interested in using or supporting SOI, or in joining the consortium.
Work on a new series of guides is underway by consortium members to help educate the greater electronics community about SOI-related methodology. An SOI design-related seminar is also planned.

And finally, we welcome two new members:

• Symmid Semiconductors (Santa Clara, CA, USA), which specializes in ASIC design services and IP; and
  
• the Université Catholique de Louvain (Belgium), which has an impressive history as the source of some key SOI-related research.

That brings our current number up to 24, with more in the wings.

There’s plenty of work to be done, but happily our momentum continues unabated. We have accomplished an enormous amount since a few companies got together last fall to talk about starting an SOI consortium.

What’s New

The Guides

Consortium member companies are contributing to a series of guides that address relevant challenges and how to solve them.

The first guides are looking at:

• Comparison methodology for SOI vs. bulk;
• SOI EDA reference design flows;
• Understanding SOI-specific electrical behavior like the history effect.

These guides will be an important step in educating potential users and reducing barriers to adoption.

 

New Members

Now joining the membership roster are:

Symmid Semiconductor Technology Université Catholique de Louvain

 

The SOI Industry Consortium is open to any company, organization or academic institution with an interest in SOI.

See the website for information on how to join

Website Update

The website is an excellent resource for both Consortium members and those interested in finding out more about SOI.

Recent additions to our website, www.soiconsortium.org, include:

• The GSA/SOI Industry Consortium survey, available for free download, is entitled: SOI Technology: Semiconductor Perception & Awareness Study.
• “Ask your question” and “Get connected” links on each page make it easy for visitors to rapidly get the information they’re looking for.

Events

Consortium participation in member events and related industry conferences is a terrific way to get the word out.

Ken Weng, TSMC’s Deputy Director of SOI Design, and Horacio Mendez, Executive Director of the SOI Industry Consortium, manning the booth at a TSMC symposium.

TSCM Technology Symposiums

The TSMC Technology Symposiums in San Jose and Austin this April represented our first opportunity to participate in a member’s event with our new booth. We received important messages from over 40 companies. The booth traffic make it very clear that there is significant interest in SOI technology, but that we need to continue to work hard to increase visibility and access to IP and tools.

 

 

DAC

In addition to having our booth at the 45th Design Automation Conference (better know as DAC) in Anaheim this June, the consortium also sponsored a successful DAC Pavilion Panel.

Entitled “SOI: Fact, Futures and Fiction” and chaired by Richard Goering of SCDsource, we had an eminent group of panelists:

• Percy Gilbert, VP Technology Development, IBM
• Nick Kepler, VP Logic Technology Development, AMD
• Jean-Luc Pelloie, Director SOI Technology, ARM

The panelists were very upbeat on value of SOI and especially on its low power advantages. They presented SOI as a robust and viable solution decreasing chip power or increasing performance.

Questions of particular interest to audience members focused on the availability of an SOI design environment – which is of course something that the consortium is actively addressing.

Finally, the panelists emphasized the complementary nature of SOI and High-K – metal gate. Aggregated, these technologies deliver a very powerful value proposition, they said.

 

* Legal Note: The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or Accompanying discussions.

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