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Articles by Philippe FLATRESSE

Philippe FLATRESSE

Philippe FLATRESSE has written 1 articles on Advanced Substrate News.

Philippe Flatresse is the Program Manager for Fully Depleted SOI Technology at STMicroelectronics, overseeing Circuit Design and Architecture. He holds a PhD in Microelectronics from the Institut National Polytechnique de Grenoble, and has coauthored over 30 papers and filed 10 patents in advanced CMOS technologies.

ST White Paper Excerpts: Planar Fully-Depleted Silicon Technology to Design Competitive SOCs at 28nm and Beyond Thumbnail

ST White Paper Excerpts: Planar Fully-Depleted Silicon Technology to Design Competitive SOCs at 28nm and Beyond

Posted by , and (Soitec) on April 24, 2012
In ASN #19, Design & Manufacturing, In & Around Our Industry
Tagged with , , , , , , , , , , , , , , , , , , , , ,

STMicroelectronics recently issued a major white paper detailing the choice of FD-SOI for consumer SOCs at 28nm and beyond. This article excerpts some of the highlights. From “Planar Fully-Depleted Silicon Technology to Design Competitive SOC at 28nm and Beyond” (White paper by STMicroelectronics and Soitec): “ FD-SOI Executive Summary Planar FD is a promising technology […]

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