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Articles by Christophe MALEVILLE

Christophe MALEVILLE

Christophe MALEVILLE has written 2 articles on Advanced Substrate News.

Senior VP, SOI BU General Manager, Soitec

Wafers for Fully Depleted SOI Devices: Ready for Volume Thumbnail

Wafers for Fully Depleted SOI Devices: Ready for Volume

Posted by Christophe MALEVILLE (Soitec) on December 8, 2010
In ASN #16, Design & Manufacturing, In & Around Our Industry
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A technological tour-de-force, Soitec’s wafers for FD SOI meet all the requirements At the 20 nm node, short channel effects and random dopant fluctuations (RDF) are the major hurdles facing the CMOS industry. An extremely attractive solution is the planar, ultra-thin body Fully-Depleted (FD) SOI transistor. These devices are built on an ultra-thin SOI substrate, …

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Benchmarking SOI vs. Bulk Defectivity Levels Thumbnail

Benchmarking SOI vs. Bulk Defectivity Levels

Posted by Christophe MALEVILLE (Soitec) on April 6, 2006
In ASN #4, Design & Manufacturing, In & Around Our Industry
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Monitoring defects using low thresholds is key to manufacturing yield. For inspecting SOI wafers, UV light overcomes the limitations of visible light. Here’s why.   With visible-light inspection tools, the scattering behavior of defects on SOI structures depends on silicon and oxide thicknesses. Because of buried interfaces, transmitted visible light is sent back to the …

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