The results of the most recent SOI Consortium benchmarking study detail the interest of planar FD-SOI as early as the 28nm and 20nm technology nodes, in terms of performance, power and manufacturability. This 3-part blog series looks further at some of the implications. Chipmakers constantly have to manage risk.  Generally it is sensible not to …

Excellent news:  the first chips produced at GlobalFoundries’ “Fab 8″ in upstate New York are based on IBM’s latest, 32nm SOI chip technology. In a joint press release, the two companies announced that the chips will be used by customers in networking, gaming and graphics. While the new chips began initial production at IBM’s 300mm …

The 2011 IEEE SOI Conference, held in Tempe, AZ last week was not one to miss…but I did. Happily, I got the papers right away, along with observations shared by some of the folks who did get there. Highlights include excellent and insightful papers from ST, ARM, IBM, Intel, Peregrine and GlobalFoundries, plus many more that indicate …

What are you going to do with your SOCs at 20/22nm? The options seem to boil down to just staying on bulk CMOS, or changing to FinFETs or planar, fully-depleted (FD) SOI-based CMOS. Though some may find comfort in staying on bulk CMOS, it’s getting very complicated – and complicated get expensive fast. The FinFET …

Engineered substrates like SOI wafers need to be ready years in advance of any major shift in technology – and before much of the rest of the materials and equipment. The fabs and foundries as well as the entire design chain – need real wafers they can work with early on to meet R&D and …

SOI (especially fully depleted “FD-SOI”) was a hot topic in the video and audio interviews that Debra Vogler of SST released recently. Here are brief summaries of the most important SOI-related interviews – with top brass from Leti, Soitec, KT, EVG and Qcept –  that she made at Semicon West ’11. (If you need a …

Guenter Reiniger, Marketing Manager for NXP’s Automotive Sensors, explains how SOI helps eliminate the need for external components in a new magnetic sensor family. Advanced Substrate News (ASN): NXP recently announced the KMA210, the first in a new family of magnetoresistive (MR) sensor chips. What is it used for? Guenter Reiniger (GR): The KMA210 is …

A new IC Knowledge report examines the costs of potential solutions for a foundry at 22nm. What are you doing at 22nm? The debate is raging in the press and forums alike. Now research firm IC Knowledge has issued a report showing that from a straight cost perspective, planar FD-SOI is a better choice than …

Nintendo’s next high-profile, high-volume CPU will leverage IBM’s 45nm SOI  for performance, power and eDRAM. If you’ve followed the ASN “Buzz” in recent weeks, you’ve seen the news: the CPU for Nintendo’s upcoming (and very cool) Wii U is on 45nm SOI. IBM’s been fabbing chips for Nintendo for over a decade, and first moved …

ST’s latest BCD shows how SOI yet again enables huge reductions in power consumption. What if you had to reduce power dissipation by 40x? That’s exactly the task that fell to ST, under an EU program called Smart Power Management. At the recent ISPSD (International Symposium on Power Semiconductor Devices and ICs) conference, STMicroelectronics and …