ASN #17 - End-User Apps - Power - SOI In Action

Smart power saves power

Posted by (STMicroelectronics) on April 8, 2011
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ST’s newest SOI-based smart power technology delivers big reductions in power consumption in medical equipment, hybrid-electric-vehicle chargers and more.

There is an urgent need for semiconductor technologies that can drastically reduce electrical energy consumption in consumer and industrial appliances. At STMicroelectronics, we have developed new SOI-based smart power technology that will make a significant difference in the power consumption of a wide range of electronic systems – from new medical equipment to battery chargers in hybrid electric vehicles.

This new work began under the aegis of an advanced European R&D* project called Smart Power Management (PM). The SmartPM project aims to put a halt to the increasing demand for energy by means of intelligent consumption, which may even reduce power usage by up to 20 percent by the year 2020.

STMicroelectronics and 17 other companies developed a range of energy-saving electronic technologies. To qualify for the program, the technologies had to be both inexpensive enough for wide market penetration and dramatic enough to make a significant impact on overall electric power consumption.

ST has been solving critical power management challenges with SOI-BCD (Bipolar-CMOS-DMOS) processes for almost a decade now. The technology we developed under the SmartPM project is a next-generation variation of our world-leading BCD smart power technology, combining SOI with 0.16-micron lithography.

This new technology enables chip designers to combine high-density logic circuitry (1.8V and 3.3V CMOS) with full dielectric isolation and a component portfolio. Included are power MOSFET transistors that can operate up to 300V, low noise devices and high-value resistors, leading to ASICs that cannot be implemented using conventional bulk-silicon substrates.

Ultrasound Proof

In cooperation with General Electric and Sintef, ST has verified the feasibility of this new semiconductor technology by producing a demonstrator chip for ultrasound scanners** that can handle hundreds of channels with extremely low power dissipation.

The goal is to address the next generation of scanners, which will require thousands of channels for real-time, 3D imaging. In terms of power consumption and dissipation, this requires a leap far beyond the best technology available today.

Transesophageal probes,which are inserted into esophagus via the throat, send a beam across the esophageal wall to image the heart structures. The constraints on space and power consumption for the embedded electronics are extremely stringent. (Courtesy: GE Vingmed Ultrasound AS)

Ultrasound probes are basically made of a transmitter, a receiver and an acoustic element to convert electrical signals to mechanical waves and vice-versa.

The state of the art in this market is measured by the number of transmitting/receiving channels integrated into a probe. On today’s leading edge, a typical number of channels is 128 or 192 for a 2D image probe, but even thousands for 3D image and endoscopic segments. The driving circuitry is realized with discrete components, with a total power consumption of about 3W. And since the probes touch the patient, the temperature must remain below 40 ºC.

The market, however, is pushing to significantly increase the number of channels to a target beyond 2800 channels with no more than 1.8W of total power consumption. This reduces the power dissipation per channel from 3W / 128 = 23.4 mW to 1.8W / 2800 = 0.64 mW: i.e. 40 times less.

Such a target is impossible with discrete components: hence a new technology was needed, which would permit the integration of 200V or more driving circuitry in a single chip.

First silicon available

ST’s new 0.18µm SOI-BCD technology with full dielectric isolation enables such integration. As such, it also enables many additional applications like power conversion, other electro-medical equipment, drivers for new batteries generation in electric cars and so on.

Cross section of N-Channel (left) and P-Channel (right) power MOS.

MOS devices for ultrasound machines need to handle different high-voltage classes: up to 300V, as well as 110V and 220V. Simulations helped to identify the best 220V components, and to ensure we could use the same masks for all classes.

Top view of the test chip layout.

Process integration and test chip layout have been completed. First silicon is now available, opening the door to the design of significantly more powerful yet dramatically more power-efficient end-user equipment.

Note: a related paper entitled “A Novel 0.16um – 300V SOIBCD for Ultrasound Medical Applications” will be presented at the 23rd International Symposium on Power Semiconductor Devices & ICs, to be held in San Diego May 23-26, 2011. See www.ispsd2011.com.

 

* Smart PM is funded by the EU’s ENIAC (European Nanoelectronics Initiative Advisory Council) initiative, as well as over a dozen national programs/funding authorities. Further information on the ENIAC JU and the SmartPM consortium is available at www.eniac.eu and www.smartpm.eu.

** The Ultrasound Medical poster referred to here was presented at the European Nanoelectronics Forum, November 2010, in Madrid, Spain.