Tagged with FD-SOI, IMEC, low-power
There was an excellent turnout at an all-day workshop on FD SOI for low-power applications, co-sponsored by IMEC and the SOI Industry Consortium. Held at the IMEC campus in Leuven, Belgium this past October, “FD SOI architecture, technology platform for low power applications for 22nm and beyond” featured speakers from IMEC, IBM, Hitachi, Soitec, UC Berkeley, ISi, CEA-Leti, ARM, Cadence, Synopsys and the SOI Industry Consortium.
It addressed the entire ecosystem that will be necessary to bring the FDSOI technology to industrial maturity and widespread adoption. The morning session looked at the technology options for FDSOI CMOS architecture, while the afternoon was devoted to SRAM scaling, the porting of the ARM core to PDSOI and TCAD, as well as other considerations for FDSOI.
In addition to the excellent presentations, those who attended indicated they appreciated the ample time between sessions to discuss and network, as well as the post-workshop reception.