SOI in Action

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Toshiba's long-awaited Cell Regza TV has hit the shelves. The SOI-based Cell processor is the key to bridging the worlds of the TV and Internet-based video.

    The Cell Regza 55X1 consists of an HD LCD 55” TV and a tuner housing the Cell chip and hard drive.
    (Courtesy: Toshiba)

- The ARM test chip, in 45nm high-performance SOI technology, was based on an ARM 1176™ processor. It provided up to 40% power savings and a 7% circuit area reduction compared to bulk CMOS low-power (LP) technology, operating at the same speed. This same implementation also demonstrated 20% higher operating frequency capability over bulk while saving 30% in total power in specific test applications. (Courtesy: ARM)

FEATURE:
the SOI design experience

E2E

Roma Rudra, the ARM engineer responsible for shifting the ARM11 design from bulk to SOI, describes the process. The mobile apps chip posted a 40% power saving with the move to SOI – without any major rework in design methodology.

BY DESIGN

SOI design tips from Cadence engineers: “go with the float”and let standard off-the-shelf solutions eliminate design-time overhead.

CHIP SHOT

Mike Mendicino of Freescale talks about the 45nm SOI design of the highly successful new QorIQ™  line of multi-core communications processors.

ON THE CIRCUIT

ESD expert Steve Voldman explains why SOI is a great tool for handling electrostatic discharge.

DESIGN TIP

Nghia Phan of IBM explains how to handle SRAM sense amps in SOI design.

FROM THE LAB

Denis Flandre of UC Louvain describes a novel transistor design that creates a new family of ultra-low power blocks – with consumption measured in sub-nanowatts.

In & Around Our Industry

SHOPTALK

KLA-Tencor's latest in-line inspection equipment for chipmakers is faster and smarter – for less waste and better yield.

INDUSTRY VIEWPOINT

With cost savings leveraged across the board, Soitec says the cost structure is on target for reaching the $500 300mm SOI wafer.

PEOPLE

EuroAsia Semiconductor magazine awards Tronics “Foundry of the Year” for growth in the downturn.

Advanced Substrate Corners

PROFESSOR'S PERSPECTIVE

From the home of the FinFET, UC Berkeley Professors Tsu-Jae Lieu and Changhwan Shin suggest planar FD-SOI is the right choice for 22nm SRAM.